Patents by Inventor Ronald Chang

Ronald Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11963927
    Abstract: A glass container for storing pharmaceutical formulations may include a glass body formed from a Type IA or Type IB glass composition according to ASTM Standard E438-92(2011). The glass body may include a wall portion with an inner surface and an outer surface, a heel portion and a floor portion, wherein the inner surface of the glass container is formed by the inner surface of the glass body. The glass body may include at least a class A2 base resistance or better according to ISO 695, at least a type HGB2 hydrolytic resistance or better according to ISO 719 and Type 1 chemical durability according to USP <660>. The glass container does not comprise a boron-rich layer on the inner surface of the glass body in as formed condition.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: April 23, 2024
    Assignee: Corning Incorporated
    Inventors: Theresa Chang, Paul Stephen Danielson, Steven Edward DeMartino, Andrei Gennadyevich Fadeev, Robert Michael Morena, Santona Pal, John Stephen Peanasky, Robert Anthony Schaut, Christopher Lee Timmons, Natesan Venkataraman, Ronald Luce Verkleeren, Dana Craig Bookbinder
  • Patent number: 11961542
    Abstract: Various illustrative aspects are directed to a data storage device comprising a slider with a resistive temperature detector with a first resistance, a resistance detection circuit electrically coupled to the first resistance and comprising a low and high frequency path corresponding to a DC and AC mode, respectively, and one or more processing devices configured to: bias the first resistance with a voltage bias, where the first resistance is coupled to a first and second amplifier, control a pulse generator to add a bias pulse on the HF path to generate a HF resistance detection signal, where the second amplifier is biased using the voltage bias and the bias pulse, control a clock to chop a LF signal at the first amplifier on the LF path, demodulate the chopped LF signal to generate a LF resistance detection signal, and concurrently process the HF and LF resistance detection signals.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: April 16, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: John Contreras, Joey M. Poss, Ronald Chang, Bernhard E. Knigge
  • Patent number: 11951072
    Abstract: A coated glass pharmaceutical package includes a glass body having a Type 1 chemical durability according to USP 660, at least a class A2 base resistance or better according to ISO 695, and at least a type HGB2 hydrolytic resistance or better according to ISO 719, the glass body having an interior surface and an exterior surface and a wall extending therebetween. A lubricous coating having a thickness of less than or equal to 90 nm may be positioned on at least a portion of the exterior surface of the glass body but not on any portion of the interior surface. The portion of the coated glass package with the lubricous coating comprises a coefficient of friction that is at least 20% less than an uncoated glass package and the coefficient of friction does not increase by more than 30% after undergoing a depyrogenation cycle including exposure to a temperature of 250° C. for a time period of 30 minutes.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: April 9, 2024
    Assignee: Corning Incorporated
    Inventors: Dana Craig Bookbinder, Theresa Chang, Paul Stephen Danielson, Steven Edward DeMartino, Andrei Gennadyevich Fadeev, Robert Michael Morena, Santona Pal, John Stephen Peanasky, Robert Anthony Schaut, Christopher Lee Timmons, Natesan Venkataraman, Ronald Luce Verkleeren
  • Patent number: 11936347
    Abstract: An application specific integrated circuit (ASIC) can drive semiconductor devices, such as, radio frequency amplifiers, switches, etc. The ASIC can include a supply and reference voltage generation circuit, a digital core, a clock generator, a plurality of analog-to-digital converters, low and high-speed communications interfaces, drain and gate sensing circuits (that can include one or more current sense amplifiers), and a gate driver circuit. The ASIC can be a low voltage semiconductor integrated circuit.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: March 19, 2024
    Assignee: Epirus, Inc.
    Inventors: Padraig James Cooney, Denpol Kultran, Ronald Chang, Harry Bourne Marr, Jr.
  • Publication number: 20240027487
    Abstract: Systems for processing a fluid sample to facilitate analysis with a semiconductor detection chip are provided herein. Such systems can include a sample processing cartridge coupleable with a chip carrier device configured for transport of the processed fluid sample from the sample cartridge. The chip carrier device can include one or more fluid channels extending between fluid-tight couplings attachable to transfer ports of the sample processing cartridge. The chip carrier device can include multiple portions or adapters, including a fluid sample portion, a flowcell portion and a chip carrier. Also provided are methods of preparing and transporting a fluid sample from a sample cartridge into a chip carrier device for analysis with a semiconductor detection chip carried within the chip carrier device.
    Type: Application
    Filed: July 25, 2023
    Publication date: January 25, 2024
    Inventors: Douglas B. Dority, Jonathan Siegrist, Ronald Chang
  • Patent number: 11874182
    Abstract: Various illustrative aspects are directed to a data storage device comprising a slider with a resistive temperature detector (RTD) having a first resistance electrically connected to a first amplifier and a plurality of controlled current sources and switches, and one or more processing devices configured to: control the switches to generate an alternating-bias signal having a first clock frequency for biasing the first resistance, modulate an input signal of the first amplifier using the first clock frequency to generate a modulated signal, demodulate an amplified modulated signal at an output of a second amplifier using the first clock frequency to generate a resistance detection signal, the second amplifier coupled to the first amplifier, and process the resistance detection signal to determine the first resistance and/or a change in value of the first resistance.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: January 16, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: John Contreras, Joey M. Poss, Ronald Chang, Bernhard E. Knigge
  • Publication number: 20240005957
    Abstract: Various illustrative aspects are directed to a data storage device comprising a slider with a resistive temperature detector with a first resistance, a resistance detection circuit electrically coupled to the first resistance and comprising a low and high frequency path corresponding to a DC and AC mode, respectively, and one or more processing devices configured to: bias the first resistance with a voltage bias, where the first resistance is coupled to a first and second amplifier, control a pulse generator to add a bias pulse on the HF path to generate a HF resistance detection signal, where the second amplifier is biased using the voltage bias and the bias pulse, control a clock to chop a LF signal at the first amplifier on the LF path, demodulate the chopped LF signal to generate a LF resistance detection signal, and concurrently process the HF and LF resistance detection signals.
    Type: Application
    Filed: August 9, 2022
    Publication date: January 4, 2024
    Inventors: John Contreras, Joey M. Poss, Ronald Chang, Bernhard E. Knigge
  • Publication number: 20240003750
    Abstract: Various illustrative aspects are directed to a data storage device comprising a slider with a resistive temperature detector (RTD) having a first resistance electrically connected to a first amplifier and a plurality of controlled current sources and switches, and one or more processing devices configured to: control the switches to generate an alternating-bias signal having a first clock frequency for biasing the first resistance, modulate an input signal of the first amplifier using the first clock frequency to generate a modulated signal, demodulate an amplified modulated signal at an output of a second amplifier using the first clock frequency to generate a resistance detection signal, the second amplifier coupled to the first amplifier, and process the resistance detection signal to determine the first resistance and/or a change in value of the first resistance.
    Type: Application
    Filed: August 9, 2022
    Publication date: January 4, 2024
    Inventors: John Contreras, Joey M. Poss, Ronald Chang, Bernhard E. Knigge
  • Patent number: 11740256
    Abstract: Systems for processing a fluid sample to facilitate analysis with a semiconductor detection chip are provided herein. Such systems can include a sample processing cartridge coupleable with a chip carrier device configured for transport of the processed fluid sample from the sample cartridge. The chip carrier device can include one or more fluid channels extending between fluid-tight couplings attachable to transfer ports of the sample processing cartridge. The chip carrier device can include multiple portions or adapters, including a fluid sample portion, a flowcell portion and a chip carrier. Also provided are methods of preparing and transporting a fluid sample from a sample cartridge into a chip carrier device for analysis with a semiconductor detection chip carried within the chip carrier device.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: August 29, 2023
    Assignee: Cepheid
    Inventors: Douglas B Dority, Jonathan Siegrist, Ronald Chang
  • Publication number: 20220399859
    Abstract: An application specific integrated circuit (ASIC) can drive semiconductor devices, such as, radio frequency amplifiers, switches, etc. The ASIC can include a supply and reference voltage generation circuit, a digital core, a clock generator, a plurality of analog-to-digital converters, low and high-speed communications interfaces, drain and gate sensing circuits (that can include one or more current sense amplifiers), and a gate driver circuit. The ASIC can be a low voltage semiconductor integrated circuit.
    Type: Application
    Filed: June 13, 2022
    Publication date: December 15, 2022
    Inventors: Padraig James Cooney, Denpol Kultran, Ronald Chang, Harry Bourne Marr, JR.
  • Publication number: 20220134338
    Abstract: A biological sample processing apparatus having an enclosure and a plurality of sample processing modules held within an enclosure with a tiltable graphical user interface screen. In one aspect, the individual modules that are readily removable for repair, replacement or upgrade. Each module is configured to be independently operable and readily inserted into the enclosure for connection with a processing unit of the enclosure. Each module can include quick-release mechanisms so that the module can be readily removed and replaced manually or with minimal tools through the front of the enclosure without requiring substantial or total disassembly of the module or entire enclosure. In another aspect, the user interface screen can display identifying information, such as a barcode, that can be scanned by a user's portable device so as to monitor the progress of an assay remotely.
    Type: Application
    Filed: November 1, 2021
    Publication date: May 5, 2022
    Inventors: Ronald Chang, Steven M. Montgomery, Gregory E. Mote, Brian M. Bliven
  • Publication number: 20210285025
    Abstract: The invention provides methods and apparatus for carrying out multiple amplification reactions in a single reaction chamber by successive cycles of loading reaction mixture, amplifying, and removing spent reaction mixture in a fluidly closed reaction system. In particular, the present invention allows amplification of a plurality of target polynucleotides from a single sample by carrying out under closed-loop control successive amplifications of different target polynucleotides from different portions of the sample.
    Type: Application
    Filed: December 22, 2020
    Publication date: September 16, 2021
    Inventors: Joseph H. Smith, David H. Persing, Alan Wortman, Ronald Chang, David Swenson
  • Publication number: 20210187505
    Abstract: A fluid control and processing system for controlling fluid flow among a plurality of chambers comprises a body including a fluid processing region continuously coupled fluidicly with a fluid displacement region. The fluid displacement region is depressurizable to draw fluid into the fluid displacement region and pressurizable to expel fluid from the fluid displacement region. The body includes at least one external port. The fluid processing region is fluidicly coupled with the at least one external port. The fluid displacement region is fluidicly coupled with at least one external port of the body. The body is adjustable with respect to the plurality of chambers to place the at least one external port selectively in fluidic communication with the plurality of chambers.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 24, 2021
    Inventors: Douglas B. Dority, Ronald Chang
  • Publication number: 20210072269
    Abstract: A handling system for high throughput processing of a large volume of biological samples is provided herein. Such systems can include an array support assembly that supports multiple diagnostic assay modules in an array having at least two dimensions, a loader that loads multiple diagnostic assay cartridges within the multiple diagnostic assay modules. The array support assembly can be movable relative the loader to facilitate loading and unloading so as to provide more efficient processing.
    Type: Application
    Filed: November 20, 2020
    Publication date: March 11, 2021
    Inventors: Ronald Chang, Steven Montgomery, Gregory Mote, Brian Bliven
  • Patent number: 10906039
    Abstract: A fluid control and processing system for controlling fluid flow among a plurality of chambers comprises a body including a fluid processing region continuously coupled fluidicly with a fluid displacement region. The fluid displacement region is depressurizable to draw fluid into the fluid displacement region and pressurizable to expel fluid from the fluid displacement region. The body includes at least one external port. The fluid processing region is fluidicly coupled with the at least one external port. The fluid displacement region is fluidicly coupled with at least one external port of the body. The body is adjustable with respect to the plurality of chambers to place the at least one external port selectively in fluidic communication with the plurality of chambers.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: February 2, 2021
    Assignee: Cepheid
    Inventors: Douglas B. Dority, Ronald Chang
  • Patent number: 10907202
    Abstract: The invention provides methods and apparatus for carrying out multiple amplification reactions in a single reaction chamber by successive cycles of loading reaction mixture, amplifying, and removing spent reaction mixture in a fluidly closed reaction system. In particular, the present invention allows amplification of a plurality of target polynucleotides from a single sample by carrying out under closed-loop control successive amplifications of different target polynucleotides from different portions of the sample.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: February 2, 2021
    Assignee: Cepheid
    Inventors: Joseph H. Smith, David H. Persing, Alan Wortman, Ronald Chang, David Swenson
  • Patent number: D908301
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: January 19, 2021
    Assignee: Cepheid
    Inventors: Ronald Chang, Steven M. Montgomery, Gregory Mote, Brian Bliven, Paul Jordan
  • Patent number: D961111
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: August 16, 2022
    Assignee: Cepheid
    Inventors: Ronald Chang, Steven M. Montgomery, Gregory Mote
  • Patent number: D973655
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: December 27, 2022
    Assignee: Cepheid
    Inventors: Ronald Chang, Stephen M. Montgomery, Gregory E. Mote
  • Patent number: D978369
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: February 14, 2023
    Assignee: Cepheid
    Inventors: Ronald Chang, Gregory Mote, Steven M. Montgomery