Abstract: A programmable data path accelerator is described. The programmable data path accelerator operates on a file server that includes a network interface for communicating with one or more clients. The network interface includes a network transaction queue. A metafile processor is configured to communicate with the network interface across a first memory-mapped bus and is configured to communicate with the storage interface across a second memory-mapped bus. A data engine configured to communicate with the network interface across the first memory-mapped bus and to communicate with the storage interface across the second memory-mapped bus.

Abstract: A data interface architecture is described. The data interface architecture includes a network-side interface for communicating with a first bus and a storage-side interface for communicating with a second bus. The data interface architecture further includes a first data cache and a second data cache. The data interface architecture further includes a first parity engine, which is configured to perform parity operations for data transactions between the network-side interface and the first data cache, and a second parity engine, which is configured to perform parity operations for data transactions between the storage-side interface and the first data cache.

Abstract: A data path accelerator with variable parity, variable length, and variable extent groups is described. The data path accelerator includes a network interface for communicating with one or more clients and a storage interface for communicating with one or more disk drives. A metafile processor is configured to queue network transaction requests to the network interface and to queue storage transaction requests to the storage interface. The metafile processor is further configured to manage file system metafile information. The file system metafile information includes disk locations of one or more distributed parity groups on the one or more disk drives. Each distributed parity group includes one or more data blocks and a parity block. The file system metafile information further includes information regarding a length of each distributed parity group.

Abstract: A data path controller architecture is disclosed. The architecture includes a network interface for communicating with one or more clients, a storage interface for communicating with one or more disk drives. A data engine configured to communicate with the storage interface to receive file data from the one or more disk drives. The data engine communicates with the network interface to send file data to the one or more clients. A CPU is configured to queue transaction requests for the data engine in response to file requests from the clients. The data engine receives file data in response to at least a portion of the transaction requests. The data engine sends file data to the one or more clients in response to the transaction requests.

Abstract: A programmable data path accelerator is described. The programmable data path accelerator operates on a file server that includes a network interface for communicating with one or more clients. The network interface includes a network transaction queue. A metafile processor is configured to communicate with the network interface across a first memory-mapped bus and is configured to communicate with the storage interface across a second memory-mapped bus. A data engine configured to communicate with the network interface across the first memory-mapped bus and to communicate with the storage interface across the second memory-mapped bus.

Abstract: A data interface architecture is described. The data interface architecture includes a network-side interface for communicating with a first bus and a storage-side interface for communicating with a second bus. The data interface architecture further includes a first data cache and a second data cache. The data interface architecture further includes a first parity engine, which is configured to perform parity operations for data transactions between the network-side interface and the first data cache, and a second parity engine, which is configured to perform parity operations for data transactions between the storage-side interface and the first data cache.