Patents by Inventor Ronald M. Smith

Ronald M. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140095563
    Abstract: A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. For composition and decomposition, one or more instructions may be employed, including a shift significand instruction.
    Type: Application
    Filed: December 6, 2013
    Publication date: April 3, 2014
    Applicant: International Business Machines Corporation
    Inventors: Shawn D. Lundvall, Eric M. Schwarz, Ronald M. Smith, SR., Phil C. Yeh
  • Patent number: 8667041
    Abstract: Detection of whether a result of a floating point operation is safe. Characteristics of the result are examined to determine whether the result is safe or potentially unsafe, as defined by the user. An instruction is provided to facilitate detection of safe or potentially unsafe results.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: March 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Michael F Cowlishaw, Shawn D Lundvall, Ronald M Smith, Phil C Yeh
  • Patent number: 8661231
    Abstract: A method, system and program product for executing a multi-function instruction in an emulated computer system by specifying, via the multi-function instruction, either a capability query or execution of a selected function of one or more optional functions, wherein the selected function is an installed optional function, wherein the capability query determines which optional functions of the one or more optional functions are installed on the computer system.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: February 25, 2014
    Assignee: International Business Machines Corporation
    Inventors: Shawn D. Lundvall, Ronald M. Smith, Sr., Phil Chi-Chung Yeh
  • Patent number: 8635257
    Abstract: A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. For composition and decomposition, one or more instructions may be employed, including a shift significand instruction.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: January 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Shawn D Lundvall, Eric M Schwarz, Ronald M Smith, Sr., Phil C Yeh
  • Patent number: 8627050
    Abstract: A method and system are disclosed for executing a machine instruction in a central processing unit. The method comprise the steps of obtaining a perform floating-point operation instruction; obtaining a test bit; and determining a value of the test bit. If the test bit has a first value, (a) a specified floating-point operation function is performed, and (b) a condition code is set to a value determined by said specified function. If the test bit has a second value, (c) a check is made to determine if said specified function is valid and installed on the machine, (d) if said specified function is valid and installed on the machine, the condition code is set to one code value, and (e) if said specified function is either not valid or not installed on the machine, the condition code is set to a second code value.
    Type: Grant
    Filed: October 8, 2007
    Date of Patent: January 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Michel H. T. Hack, Ronald M. Smith, Sr.
  • Patent number: 8560591
    Abstract: Detection of whether a result of a floating point operation is safe. Characteristics of the result are examined to determine whether the result is safe or potentially unsafe, as defined by the user. An instruction is provided to facilitate detection of safe or potentially unsafe results.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: October 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: Shawn D. Lundvall, Ronald M. Smith, Sr., Phil C. Yeh, Michael Frederic Cowlishaw
  • Publication number: 20130254478
    Abstract: A protocol for communicating with the timing facility used in a data processing network to provide synchronization is provided via the execution of a machine instruction that accepts a plurality of commands. The interaction is provided through the use of message request blocks and their associated message response blocks. In this way timing parameters may be determined, modified and communicated. This makes it much easier for multiple servers or nodes in a data processing network to exist as a coordinated timing network and to thus more cooperatively operate on the larger yet identical data files.
    Type: Application
    Filed: May 7, 2013
    Publication date: September 26, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Scott M. Carlson, Donald Crabtree, Dennis J. Dahlen, Beth A. Glendening, Michel H.T. Hack, Denise M. Sevigny, Ronald M. Smith, SR., David E. Whitney
  • Patent number: 8468184
    Abstract: A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. For composition and decomposition, one or more instructions may be employed, including an insert biased exponent or extract biased exponent instruction.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: June 18, 2013
    Assignee: International Business Machines Corporation
    Inventors: Shawn D. Lundvall, Eric M. Schwarz, Ronald M. Smith, Sr., Phil C. Yeh
  • Patent number: 8458361
    Abstract: A protocol for communicating with the timing facility used in a data processing network to provide synchronization is provided via the execution of a machine instruction that accepts a plurality of commands. The interaction is provided through the use of message request blocks and their associated message response blocks. In this way timing parameters may be determined, modified and communicated. This makes it much easier for multiple servers or nodes in a data processing network to exist as a coordinated timing network and to thus more cooperatively operate on the larger yet identical data files.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: June 4, 2013
    Assignee: International Business Machines Corporation
    Inventors: Scott M. Carlson, Donald Crabtree, Dennis J. Dahlen, Beth A. Glendening, Michel H. T. Hack, Denise M. Sevigny, Ronald M. Smith, Sr., David E. Whitney
  • Patent number: 8443029
    Abstract: A round-far-reround mode (preferably in a BID encoded Decimal format) of a floating point instruction prepares a result for later rounding to a variable number of digits by detecting that the least significant digit may be a 0, and if so changing it to 1 when the trailing digits are not all 0. A subsequent reround instruction is then able to round the result to any number of digits at least 2 fewer than the number of digits of the result. An optional embodiment saves a tag indicating the fact that the low order digit of the result is 0 or 5 if the trailing bits are non-zero in a tag field rather than modify the result. Another optional embodiment also saves a half-way-and-above indicator when the trailing digits represent a decimal with a most significant digit having a value of 5. An optional subsequent rewound instruction is able to round the result to any number of digits fewer or equal, to the number of digits of the result using the saved tags.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: May 14, 2013
    Assignee: International Business Machines Corporation
    Inventors: Michael F. Cowlishaw, Eric M. Schwarz, Ronald M. Smith, Sr., Phil C. Yeh
  • Publication number: 20130108829
    Abstract: A lead frame for insert molding in a plastic body is provided with an opening defining an edge suitable for detection by pattern recognition systems. During the insert molding process, a pin is positioned in the opening so that the opening remains void of plastic following the injection molding process.
    Type: Application
    Filed: August 30, 2012
    Publication date: May 2, 2013
    Inventor: RONALD M. SMITH
  • Patent number: 8423595
    Abstract: A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. For composition and decomposition, one or more instructions may be employed, including one or more convert instructions.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: April 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Shawn D. Lundvall, Eric M. Schwarz, Ronald M. Smith, Sr., Phil C. Yeh
  • Patent number: 8386756
    Abstract: A new zSeries floating-point unit has a fused multiply-add dataflow capable of supporting two architectures and fused MULTIPLY and ADD and Multiply and SUBTRACT in both RRF and RXF formats for the fused functions. Both binary and hexadecimal floating-point instructions are supported for a total of 6 formats. The floating-point unit is capable of performing a multiply-add instruction for hexadecimal or binary every cycle with a latency of 5 cycles. This supports two architectures with two internal formats with their own biases. This has eliminated format conversion cycles and has optimized the width of the dataflow. The unit is optimized for both hexadecimal and binary floating-point architecture supporting a multiply-add/subtract per cycle.
    Type: Grant
    Filed: April 11, 2011
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Eric M. Schwarz, Ronald M. Smith, Sr.
  • Publication number: 20120254628
    Abstract: A method, system and program product for executing a multi-function instruction in an emulated computer system by specifying, via the multi-function instruction, either a capability query or execution of a selected function of one or more optional functions, wherein the selected function is an installed optional function, wherein the capability query determines which optional functions of the one or more optional functions are installed on the computer system.
    Type: Application
    Filed: June 4, 2012
    Publication date: October 4, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shawn D. LUNDVALL, Ronald M. SMITH, SR., Phil Chi-Chung YEH
  • Patent number: 8261048
    Abstract: A method, system and program product for executing a multi-function instruction in an emulated computer system by specifying, via the multi-function instruction, either a capability query or execution of a selected function of one or more optional functions, wherein the selected function is an installed optional function, wherein the capability query determines which optional functions of the one or more optional functions are installed on the computer system.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: September 4, 2012
    Assignee: Intenational Business Machines Corporation
    Inventors: Shawn D. Lundvall, Ronald M. Smith, Sr., Phil Chi-Chung Yeh
  • Publication number: 20120173917
    Abstract: A system, method and computer program product for steering a time-of-day (TOD) clock for a computer system having a physical clock providing a time base for executing operations that is stepped to a common oscillator. The method includes receiving, at a processing unit, a request to change a clock steering rate used to control a TOD-clock offset value for the processing unit, the TOD-clock offset defined as a function of a start time (s), a base offset (b), and a steering rate (r). The unit schedules a next episode start time with which to update the TOD-clock offset value. After updating TOD-clock offset value (d) at the scheduled time, TOD-clock offset value is added to a physical-clock value (Tr) value to obtain a logical TOD-clock value (Tb), where the logical TOD-clock value is adjustable without adjusting a stepping rate of the oscillator.
    Type: Application
    Filed: February 22, 2012
    Publication date: July 5, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eberhard Engler, Mark S. Farrell, Klaus Meissner, Ronald M. Smith, SR., Mark A. Check, Evangelyn K. Smith
  • Patent number: 8195727
    Abstract: A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. For composition and decomposition, one or more instructions may be employed, including one or more convert instructions.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: June 5, 2012
    Assignee: International Business Machines Corporation
    Inventors: Shawn D. Lundvall, Eric M. Schwarz, Ronald M. Smith, Sr., Phil C. Yeh
  • Patent number: 8190664
    Abstract: A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. For composition and decomposition, one or more instructions may be employed, including one or more convert instructions.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: May 29, 2012
    Assignee: International Business Machines Corporation
    Inventors: Shawn D. Lundvall, Eric M. Schwarz, Ronald M. Smith, Sr., Phil C. Yeh
  • Publication number: 20120096283
    Abstract: A method, system and program product for executing a multi-function instruction in an emulated computer system by specifying, via the multi-function instruction, either a capability query or execution of a selected function of one or more optional functions, wherein the selected function is an installed optional function, wherein the capability query determines which optional functions of the one or more optional functions are installed on the computer system.
    Type: Application
    Filed: December 13, 2011
    Publication date: April 19, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shawn D. LUNDVALL, Ronald M. SMITH, SR., Phil Chi-Chung YEH
  • Patent number: 8135978
    Abstract: A system, method and computer program product for performing a Perform Timing Facility (PTFF) instruction for steering a Time of Day (TOD) clock of the computer system for synchronizing the TOD clock with TOD clocks of other computer systems. The computer system comprises a memory; and, a processor in communications with the computer memory.
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: March 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Eberhard Engler, Mark S. Farrell, Klaus Meissner, Ronald M. Smith, Sr., Evangelyn K. Smith, legal representative, Mark A. Check