Abstract: In a system having an input signal set with at least two signals having mutually exclusive frequencies f1 and f2 being part of the input signal set, whose amplitude is represented in an input digital representation, the amplitudes of each of the at least two signals are digitally represented. A digital representation of the frequency of each of the signals is derived. A digital representation of the sine function and of the cosine function of the frequency of each of the signals is derived based on the digital representation of the frequency. The digital representations of each of the sine and cosine functions is mixed with the input digital representation to derive digital representations of the sine and cosine functions of each of the signals. The digital representations of the sine and cosine functions of each of the signals are processed to derive a digital representation of the amplitude of each of the signals.

Abstract: A headerless, fault-tolerant sample-data servo pattern, comprising an alternating sequence of first and second servo sectors, with the first servo sectors each including a partial track address and circumferential orientation information, and the second servo sectors each including a full track address, provides an absolute indication of a read/write head's circumferential orientation along a given track on a magnetic disk which is robust in the presence of defects in the magnetic recording medium.

Abstract: Apparatus for detecting data track misregistration is described. The present invention involves the interaction of a microprocessor with a demodulator. Microcode within the microprocessor initiates a misregistration scan of all data tracks at specific intervals to generate a calibration offset table that is used to direct the heads during the subsequent interval. A demodulator obtains the peak values of calibration servo bursts, displaced one-half of the track width to either side of a track, and outputs a timing pulse proportional to their respective peak voltage values. A timer within the microprocessor extracts the time values, and the misregistration displacement is calculated by the comparison of the inner burst and outer burst time values. The calculated displacement is used in the offset table for subsequent disk references.

Abstract: A sample data position error signal detection means is described. This invention is suited for use in a digital sector servo in a magnetic media disk drive environment. In particular, the invention relates to the detection and presentation in digital form of position error signals (PES) representative of magnitude and sign of recording head displacement from a track centerline. The circuits disclosed provide a digital representation of PES suitable for direct application to a digital signal processor which controls overall servo positioning operations. The invention detects the PES by an integration method and incorporates the innovation of requiring only two integrators to demodulate a PES having an arbitrarily large number of phases. The invention uses a phaselock oscillator having a hybrid digital/analog phase detector to generate the coherent carrier sequence for synchronous detection of PES. A further innovation of the invention is the use of a fully digital automatic gain control circuit (AGC).

Abstract: A phase lock loop for a sector servo system. A servo phase lock loop oscillator provides the control timing function of the servo. Initially, the PLO is locked in frequency to a frequency reference obtained from a counter/timer in a digital signal processor (DSP) used to control the servo system. Subsequent to acquisition of the nominal operation frequency, the PLO is caused to lock in turn to gap and frame character markers derived from the digital information encoded into the servo burst. Transition between PLO reference sources is commanded by the microprogram running in the DSP, based upon microprogram assessment of servo PLO status. The PLO outputs timing control tags to the servo control logic and PES demodulator, a reference clock to the file read/write channel, and interrupt pulses to the DSP to synchronize DSP operation with the servo hardware, and initiate periodic DSP computation of the control algorithm.

Abstract: A phase lock loop for a sector servo system. A servo phase lock loop oscillator provides the control timing function of the servo. Initially, the PLO is locked in frequency to a frequency reference obtained from a counter/timer in a digital signal processor (DSP) used to control the servo system. Subsequent to acquisition of the nominal operation frequency, the PLO is caused to lock in turn to gap and frame character markers derived from the digital information encoded into the servo burst. Transition between PLO reference sources is commanded by the microprogram running in the DSP, based upon microprogram assessment of servo PLO status. The PLO outputs timing control tags to the servo control logic and PES demodulator, a reference clock to the file read/write channel, and interrupt pulses to the DSP to synchronize DSP operation with the servo hardware, and initiate periodic DSP computation of the control algorithm.

Abstract: A sample data position error signal detection means. This invention has application in a digital servo in a magnetic media disk drive environment. In particular, the invention relates to the detection in digital form of position error signals (PES) representative of magnitude and sign of recording head displacement from a track center line. The circuits disclosed provide a digital representation of PES suitable for direct application to a digital signal processor which controls overall servo positioning operations. The invention detects the PES by employing a digital integrator which comprises a register and adder. The composite servo data is first amplified by variable gain amplifier and then undergoes low pass filtering before being digitized by an analog to digital converter (ADC). The digital integration is performed by accumulating a constant number of ADC samples in the register.

Abstract: In the present invention, a single sector counter and accompanying multiple buffer registers are used to provide the sector count for a plurality of recording zones. Initially, the sector counter is validated by synchronizing it with an index mark. In one embodiment, an angular position sensing counter counts a clock having a frequency and phase to match the occurrence of segments in a reference zone. A look up table or computation provides an offset value representing the difference between each reference zone segment boundary, and the occurrence of the next consecutive sector in each of the recording zones. Additional logic generates periodic sector pulses once the zone transition has been accomplished, and provides means to prevent generation of shortened sector intervals. This permits rapid validation of the sector signal so that it is no longer necessary to wait for the index in a hard-sectored drive before establishing the sector position when changing zones.

Abstract: A fault tolerant servo index scheme is described. The present invention provides a servo index pattern and detection method which can be utilized to any servo scheme, including, but not limited to, sector servo and dedicated surface servo. The servo pattern of the preferred embodiment of present invention is a twelve bit pattern chosen to limit the side lobes of an autocorrelation plot of the pattern with a template of the pattern. In this manner a greater number of errors can be tolerated while still permitting index identification. Initially, the entire servo pattern on a servo track is detected in sequence at the bit rate. Each twelve bit sequences of bits is compared to a template of the servo pattern and the number of bits whose position and value ("1" or "0") match the template are determined. Whenever a threshold level (less than the total number of bits in the pattern) of "hits" takes place it assumed that the index has been detected.

Abstract: A phase-lock oscillator for use in conjunction with a rotatable servo surface having a servo encoding scheme of timing information and position-indicating-information, including a VCO, a phase-frequency detector, responsive to two input signals, for generating a phase and frequency error signal to control the output frequency signal of the VCO, and a control circuit for generating the two input signals in response to the timing information and output frequency signal, the control circuit being substantially digital and having passive delay lines of short delay and having a lock detector to indicate acquisition or loss of synchronization of the phase-lock oscillator with the timing information.