Patents by Inventor Ruchir Puri

Ruchir Puri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10831738
    Abstract: Apparatuses and Methods for sorting a data set. A data storage is divided into a plurality of buckets that is each associated with a respective key value. A plurality of stripes is identified in each bucket. A plurality of data stripe sets is defined that has one stripe within each respective bucket. A first and a second in-place partial bucket radix sort are performed on data items contained within the first and second data stripe sets, respectively, using an initial radix. Incorrectly sorted data items in the first bucket are grouped by a first processor and incorrectly sorted data items in the second bucket are grouped by a second processor into a respective incorrect data item group within each bucket. A radix sort is then performed using the initial radix on the items within the respective incorrect data item group. A first level sorted output is produced.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Rajesh Bordawekar, Daniel Brand, Minsik Cho, Ulrich Finkler, Ruchir Puri
  • Patent number: 10740232
    Abstract: An iterative graph algorithm accelerating method, system, and computer program product, include recording an order of access nodes in a memory layout, reordering the access nodes in the memory layout in accordance with the recorded order, and updating edge information of the reordered access nodes.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: August 11, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, Daniel Brand, Ulrich Alfons Finkler, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20200193243
    Abstract: A method, system, and computer program product, including generating a contrastive explanation for a decision of a classifier trained on structured data, highlighting an important feature that justifies the decision, and determining a minimal set of new values for features that alter the decision.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 18, 2020
    Inventors: Amit Dhurandhar, Pin-Yu Chen, Karthikeyan Shanmugam, Tejaswini Pedapati, Avinash Balakrishnan, Ruchir Puri
  • Patent number: 10685002
    Abstract: An information processing system, computer readable storage medium, and method for accelerated radix sort processing of data elements in an array in memory. The information processing system stores an array of data elements in a buffer memory in an application specific integrated circuit radix sort accelerator. The array has a head end and a tail end. The system radix sort processing, with a head processor, data elements starting at the head end of the array and progressively advancing radix sort processing data elements toward the tail end of the array. The system radix sort processing, with a tail processor, data elements starting at the tail end of the array and progressively advancing radix sort processing data elements toward the head end of the array, the tail processor radix sort processing data elements in the array contemporaneously with the head processor radix sort processing data elements in the array.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: June 16, 2020
    Assignee: International Business Machines Corporation
    Inventors: Rajesh Bordawekar, Daniel Brand, Minsik Cho, Brian R. Konigsburg, Ruchir Puri
  • Publication number: 20200184350
    Abstract: A post-processing method, system, and computer program product for post-hoc improvement of instance-level and group-level prediction metrics, including training a bias detector that learns to detect a sample that has an individual bias greater than a predetermined individual bias threshold value with constraints on a group bias, applying the bias detector on a run-time sample to select a biased sample in the run-time sample having a bias greater than the predetermined individual bias threshold bias value, and suggesting a de-biased prediction for the biased sample.
    Type: Application
    Filed: December 10, 2018
    Publication date: June 11, 2020
    Inventors: Manish Bhide, pranay Lohia, Karthikeyan Natesan Ramamurthy, Ruchir puri, Diptikalyan Saha, Kush Raj Varshney
  • Patent number: 10671611
    Abstract: A first quicksort is performed in parallel across pairs of partitions of a dataset assigned to respective ones of available processors, including swapping elements of a first partition of a given one of the pairs that are larger than a pivot with elements of a second partition of the given pair that are smaller than the pivot. A second quicksort is performed in parallel across those partitions having elements left unsorted by the first quicksort, and first misplaced elements from a first side of the dataset corresponding to the first partition are swapped with second misplaced elements from a second side of the dataset corresponding to the second partition to produce a first dataset having elements equal to or lower than the pivot and a second dataset having elements equal to or higher than the pivot.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: June 2, 2020
    Assignee: International Business Machines Corporation
    Inventors: Daniel Brand, Minsik Cho, Ruchir Puri
  • Publication number: 20200134493
    Abstract: Systems and methods for detecting indirect bias in machine learning models are provided. A computer-implemented method includes: receiving, by a computer device, a user request to detect transitive bias in a machine learning model; determining, by the computer device, correlations of attributes of neighboring data not included in a dataset of the machine learning model; ranking, by the computer device, the attributes based on the determined correlations; and returning, by the computer device, a list of the ranked attributes to a user that generated the user request.
    Type: Application
    Filed: October 31, 2018
    Publication date: April 30, 2020
    Inventors: Manish Bhide, Ruchir Puri, Ravi Chandra Chamarthy
  • Patent number: 10572569
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring a second problem matrix of a second problem to a first problem matrix of a first problem as paired matrices and shifting the second problem matrix by N+1 and combining the first problem matrix and the mirrored second problem matrix into one matrix of (N+1)×N by merging the first problem matrix and the mirrored second problem matrix. The first problem matrix and the second problem matrix are symmetric and positive definite matrices.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: February 25, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20200057790
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring a second problem matrix of a second problem to a first problem matrix of a first problem as paired matrices and shifting the second problem matrix by N+1 and combining the first problem matrix and the mirrored second problem matrix into one matrix of (N+1)×N, where the first problem shared memory comprises regular intervals, where the second problem shared memory is continuous, and where the GPU performs batched dense Cholesky decomposition with the one matrix from the combining to accelerate the Cholesky decomposition.
    Type: Application
    Filed: October 28, 2019
    Publication date: February 20, 2020
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20190354878
    Abstract: Mechanisms, in a system comprising a host system and at least one accelerator device, for performing a concept analysis operation are provided. The host system extracts a set of one or more concepts from an information source and provides the set of one or more concepts to the accelerator device. The host system also provides at least one matrix representation data structure representing a graph of concepts and relationships between concepts in a corpus. The accelerator device executes the concept analysis operation internal to the accelerator device to generate an output vector identifying concepts in the corpus, identified in the at least one matrix representation data structure, related to the set of one or more concepts extracted from the information source. The accelerator device outputs the output vector to the host system which utilizes the output vector to respond to a request submitted to the host system associated with the information source.
    Type: Application
    Filed: August 2, 2019
    Publication date: November 21, 2019
    Inventors: Emrah Acar, Rajesh R. Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Ruchir Puri, Haifeng Qian, Livio B. Soares
  • Publication number: 20190294651
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring a second problem matrix of a second problem to a first problem matrix of a first problem as paired matrices and shifting the second problem matrix by N+1 and combining the first problem matrix and the mirrored second problem matrix into one matrix of (N+1)×N by merging the first problem matrix and the mirrored second problem matrix. The first problem matrix and the second problem matrix are symmetric and positive definite matrices.
    Type: Application
    Filed: June 13, 2019
    Publication date: September 26, 2019
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Patent number: 10423695
    Abstract: A batched Cholesky decomposition method, system, and non-transitory computer readable medium for a Graphics Processing Unit (GPU), include mirroring a second problem matrix of a second problem to a first problem matrix of a first problem as paired matrices and shifting the second problem by N+1, combining the first problem matrix and the mirrored second problem matrix into one matrix of (N+1)×N, and reading the fixed size data length of the one square matrix with a fixed data interval for both the first problem and the second problem.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: September 24, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, David Shing-ki Kung, Ruchir Puri
  • Patent number: 10373057
    Abstract: Mechanisms, in a system comprising a host system and at least one accelerator device, for performing a concept analysis operation are provided. The host system extracts a set of one or more concepts from an information source and provides the set of one or more concepts to the accelerator device. The host system also provides at least one matrix representation data structure representing a graph of concepts and relationships between concepts in a corpus. The accelerator device executes the concept analysis operation internal to the accelerator device to generate an output vector identifying concepts in the corpus, identified in the at least one matrix representation data structure, related to the set of one or more concepts extracted from the information source. The accelerator device outputs the output vector to the host system which utilizes the output vector to respond to a request submitted to the host system associated with the information source.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: August 6, 2019
    Assignee: International Business Machines Corporation
    Inventors: Emrah Acar, Rajesh R. Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Ruchir Puri, Haifeng Qian, Livio B. Soares
  • Patent number: 10310812
    Abstract: Mechanisms are provided for performing a matrix operation. A processor of a data processing system is configured to perform cluster-based matrix reordering of an input matrix. An input matrix, which comprises nodes associated with elements of the matrix, is received. The nodes are clustered into clusters based on numbers of connections with other nodes within and between the clusters, and the clusters are ordered by minimizing a total length of cross cluster connections between nodes of the clusters, to thereby generate a reordered matrix. A lookup table is generated identifying new locations of nodes of the input matrix, in the reordered matrix. A matrix operation is then performed based on the reordered matrix and the lookup table.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: June 4, 2019
    Assignee: International Business Machines Corporation
    Inventors: Emrah Acar, Rajesh R. Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Ruchir Puri, Haifeng Qian, Livio B. Soares
  • Publication number: 20190114260
    Abstract: An iterative graph algorithm accelerating method, system, and computer program product, include recording an order of access nodes in a memory layout, reordering the access nodes in the memory layout in accordance with the recorded order, and updating edge information of the reordered access nodes.
    Type: Application
    Filed: December 12, 2018
    Publication date: April 18, 2019
    Inventors: Minsik Cho, Daniel Brand, Ulrich Alfons Finkler, David Shing-ki Kung, Ruchir Puri
  • Patent number: 10209913
    Abstract: An iterative graph algorithm accelerating method, system, and computer program product, include recording an order of access nodes in a memory layout, reordering the access nodes in the memory layout in accordance with the recorded order, and updating edge information of the reordered access nodes.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: February 19, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Minsik Cho, Daniel Brand, Ulrich Alfons Finkler, David Shing-ki Kung, Ruchir Puri
  • Publication number: 20180357283
    Abstract: A first quicksort is performed in parallel across pairs of partitions of a dataset assigned to respective ones of available processors, including swapping elements of a first partition of a given one of the pairs that are larger than a pivot with elements of a second partition of the given pair that are smaller than the pivot. A second quicksort is performed in parallel across those partitions having elements left unsorted by the first quicksort, and first misplaced elements from a first side of the dataset corresponding to the first partition are swapped with second misplaced elements from a second side of the dataset corresponding to the second partition to produce a first dataset having elements equal to or lower than the pivot and a second dataset having elements equal to or higher than the pivot.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Inventors: Daniel Brand, Minsik Cho, Ruchir Puri
  • Patent number: 10108670
    Abstract: Methods and systems for sorting a dataset include partitioning the dataset into 2npartitions, where n is a number of available processors. A first quicksort is performed in parallel across pairs of partitions based on a pivot using a plurality of processors. A second quicksort is performed in parallel on unsorted elements within each partition based on the pivot, where the unsorted elements were left unsorted by the first quicksort. Misplaced elements from a left side of the dataset are swapped with misplaced elements from a right side of the dataset to produce a left dataset that has elements equal to or lower than the pivot and a right dataset that has elements equal to or higher than the pivot.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: October 23, 2018
    Assignee: International Business Machines Corporation
    Inventors: Daniel Brand, Minsik Cho, Ruchir Puri
  • Publication number: 20180217775
    Abstract: An iterative graph algorithm accelerating method, system, and computer program product, include recording an order of access nodes in a memory layout, reordering the access nodes in the memory layout in accordance with the recorded order, and updating edge information of the reordered access nodes.
    Type: Application
    Filed: January 31, 2017
    Publication date: August 2, 2018
    Inventors: Minsik Cho, Daniel Brand, Ulrich Alfons Finkler, David Shing-ki Kung, Ruchir Puri
  • Patent number: 10037190
    Abstract: Techniques for transforming input operands to reduce overhead for implementing addition operations in hardware are provided. In one aspect, a method for transforming input operands of an adder includes the steps of: receiving a bit array of the input operands; replacing a duplicate signal (e.g., a signal that occurs twice) for a given bit k in the bit array with a single signal at bit k+1; reducing a number of occurrences of the signal on adjacent bits of the input operand, wherein by way of the replacing and reducing a transformed bit array is formed; and providing the transformed bit array to the adder.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: July 31, 2018
    Assignee: International Business Machines Corporation
    Inventors: Mihir Choudhury, David J. Geiger, Ruchir Puri, Andrew J. Sullivan