Patents by Inventor Ruomei Bian

Ruomei Bian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240377685
    Abstract: An array substrate, including a first substrate, and a plurality of gate lines and a plurality of data lines defining a plurality of subpixel regions each including a reflective region and a transmissive region, wherein the reflective region includes a reflective electrode, and the transmissive region includes a transmissive electrode; a first spacing region including a preset subregion is between two adjacent reflective electrodes in a first direction; the data line includes a first portion in the preset subregion, and a width of the first portion in the first direction is smaller than that of the preset subregion; and the array substrate further includes a first light shielding pattern opposite to the first portion and in the same layer as the gate lines, where an orthographic projection of the first light shielding pattern on the first substrate completely covers an orthographic projection of the preset subregion on the first substrate.
    Type: Application
    Filed: August 1, 2022
    Publication date: November 14, 2024
    Inventors: Ruomei BIAN, Jian WANG, Yong ZHANG, Xianglei QIN, Xing XU, Jiaxing WANG, Xuan ZHONG, Honggui JIN, Liangzhen TANG, Zhaohu YU, Wulin ZHANG, Yongzhong ZHANG
  • Publication number: 20240355267
    Abstract: A scan circuit is provided. The scan circuit includes a plurality of stages. A respective stage of the scan circuit includes a respective scan unit configured to provide a control signal to one or more rows of subpixels. A respective scan unit includes a first subcircuit, a second subcircuit, a third subcircuit, a fourth subcircuit. A pull-up node is coupled to the second subcircuit, the third subcircuit, and the fourth subcircuit. A pull-down node is coupled to the second subcircuit, the third subcircuit. The denoising subcircuit is coupled to a pull-up node and the input terminal, or coupled between a third power supply voltage terminal and the pull-down control node.
    Type: Application
    Filed: September 26, 2022
    Publication date: October 24, 2024
    Applicants: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE Technology Group Co., Ltd.
    Inventors: Jian Wang, Honggui Jin, Hanqing Liu, Yong Zhang, Xin Li, Yong Song, Ruomei Bian, Zhilong Duan, Peipei Wang, Yang Liu, Yue Yang
  • Publication number: 20240296768
    Abstract: The present disclosure provides a driving circuit, a driving method and a display device. The driving circuit includes a first pull-down node, a first control circuit and a pull-up node reset circuit; the first control circuit is configured to control to connect the first pull-down node and the first voltage terminal under the control of the first control signal provided by the first control terminal, so that a potential of the first pull-down node is a valid voltage; the pull-up node reset circuit is configured to control to connect the pull-up node and the second voltage terminal when the potential of the first pull-down node is a valid voltage, so as to reset the potential of the pull-up node.
    Type: Application
    Filed: April 28, 2022
    Publication date: September 5, 2024
    Inventors: Honggui JIN, Hongjun YU, Hanqing LIU, Jian WANG, Yong ZHANG, Ruomei BIAN, Peipei WANG, Zhilong DUAN, Yue YANG, Xin LI, Yong SONG, Qiang WANG
  • Publication number: 20240248359
    Abstract: The invention discloses a display substrate, a display panel and a display device.
    Type: Application
    Filed: May 14, 2021
    Publication date: July 25, 2024
    Inventors: Zepeng SUN, Xianglei QIN, Jinshuai DUAN, Yong ZHANG, Xiaojuan WU, Limin ZHANG, Zhilong DUAN, Zhiqiang YU, Liangzhen TANG, Honggui JIN, Ruomei BIAN, Zhaohu YU, Xing XU, Wulin ZHANG, Xiaofeng YIN
  • Publication number: 20240178235
    Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate; a plurality of thin film transistors on the base substrate, each thin film transistor including a gate electrode on the base substrate; a gate insulating layer on the gate electrode; a semiconductor layer on the gate insulating layer; and a first electrode and a second electrode on the semiconductor layer; wherein the gate electrode includes an inner portion and a peripheral portion, the peripheral portion including a first portion and a second portion, wherein an orthographic projection of the second portion on the base substrate is closer to an orthographic projection of an end of the gap on the base substrate than an orthographic projection of the first portion on the base substrate, and a width of the first portion is less than a width of the second portion.
    Type: Application
    Filed: August 27, 2021
    Publication date: May 30, 2024
    Inventors: Liangzhen Tang, Zhilong Duan, Xianglei Qin, Jian Wang, Yong Zhang, Ruomei Bian, Wulin Zhang, Xing Xu, Honggui Jin, Zhaohu Yu, Jinshuai Duan