Patents by Inventor Russ Lie

Russ Lie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8316536
    Abstract: A method of making a semiconductor package substrate includes laser-ablating channels in the substrate. After the channels are ablated in the substrate, conductive material is added to fill the channels and cover the surface of the substrate. Then a photomask etching process simultaneously forms a circuit pattern above the surface of the substrate and removes excess metal above the channels, by removing metal above the surface only in patterned regions. The result is a two-level circuit pattern having conductors within and above the substrate.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: November 27, 2012
    Assignee: Amkor Technology, Inc.
    Inventors: Ronald Patrick Huemoeller, David Jon Hiner, Russ Lie
  • Patent number: 7692286
    Abstract: A method of forming an electronic component package includes: forming electrically conductive traces for connecting first selected bond pads of a plurality of bond pads on a first surface of an electronic component to corresponding bonding locations formed on a second surface of the electronic component; coupling the first surface of the electronic component to a first surface of a lower dielectric strip; coupling the second surface of the electronic component to a first surface of an upper dielectric strip; forming lower via apertures through the lower dielectric strip to expose second selected bond pads of the plurality of bond pads on the first surface of the electronic component; forming upper via apertures through the upper dielectric strip to expose the bonding locations on the second surface of the electronic component; filling the lower and upper via apertures with an electrically conductive material to form lower and upper vias electrically coupled to the first and second selected bond pads of the pl
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: April 6, 2010
    Assignee: Amkor Technology, Inc.
    Inventors: Ronald Patrick Huemoeller, Russ Lie, David Hiner
  • Patent number: 7420272
    Abstract: A method of forming an electronic component package includes: forming electrically conductive traces for connecting first selected bond pads of a plurality of bond pads on a first surface of an electronic component to corresponding bonding locations formed on a second surface of the electronic component; coupling the first surface of the electronic component to a first surface of a lower dielectric strip; coupling the second surface of the electronic component to a first surface of an upper dielectric strip; forming lower via apertures through the lower dielectric strip to expose second selected bond pads of the plurality of bond pads on the first surface of the electronic component; forming upper via apertures through the upper dielectric strip to expose the bonding locations on the second surface of the electronic component; filling the lower and upper via apertures with an electrically conductive material to form lower and upper vias electrically coupled to the first and second selected bond pads of the pl
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: September 2, 2008
    Assignee: Amkor Technology, Inc.
    Inventors: Ronald Patrick Huemoeller, Russ Lie, David Hiner
  • Patent number: 7247523
    Abstract: A method of forming an electronic component package includes: forming electrically conductive traces for connecting first selected bond pads of a plurality of bond pads on a first surface of an electronic component to corresponding bonding locations formed on a second surface of the electronic component; coupling the first surface of the electronic component to a first surface of a lower dielectric strip; coupling the second surface of the electronic component to a first surface of an upper dielectric strip; forming lower via apertures through the lower dielectric strip to expose second selected bond pads of the plurality of bond pads on the first surface of the electronic component; forming upper via apertures through the upper dielectric strip to expose the bonding locations on the second surface of the electronic component; filling the lower and upper via apertures with an electrically conductive material to form lower and upper vias electrically coupled to the first and second selected bond pads of the pl
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: July 24, 2007
    Assignee: Amkor Technology, Inc.
    Inventors: Ronald Patrick Huemoeller, Russ Lie, David Hiner