Patents by Inventor Russell J. Low

Russell J. Low has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110315899
    Abstract: Glitches during ion implantation of a workpiece, such as a solar cell, can be compensated for. In one instance, a workpiece is implanted during a first pass at a first speed. This first pass results in a region of uneven dose in the workpiece. The workpiece is then implanted during a second pass at a second speed. This second speed is different from the first speed. The second speed may correspond to the entire workpiece or just the region of uneven dose in the workpiece.
    Type: Application
    Filed: June 28, 2011
    Publication date: December 29, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Russell J. LOW, Atul GUPTA, William T. WEAVER
  • Patent number: 7999239
    Abstract: Techniques for reducing an electrical stress in a acceleration/deceleration system are disclosed. In one particular exemplary embodiment, the techniques may be realized as an acceleration/deceleration system. The acceleration/deceleration system may comprise an acceleration column including a plurality of electrodes having apertures through which a charged particle beam may pass. The acceleration/deceleration system may also comprise a plurality of voltage grading components respectively electrically coupled to the plurality of electrodes. The acceleration/deceleration system may further comprise a plurality of insulated conductors disposed proximate the plurality of voltage grading components to modify an electrical field about the plurality of voltage grading components.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: August 16, 2011
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Kasegn D. Tekletsadik, Russell J. Low
  • Patent number: 8000080
    Abstract: An apparatus and method for trapping particles in a housing is disclosed. A high voltage terminal/structure is situated within a housing. A conductive material, having a plurality of holes, such as a mesh, is disposed a distance away from an interior surface of the housing, such as the floor of the housing, forming a particle trap. The conductive mesh is biased so that the electrical field within the trap is either non-existent or pushing toward the floor, so as to retain particles within the trap. Additionally, a particle mover, such as a fan or mechanical vibration device, can be used to urge particles into the openings in the mesh. Furthermore, a conditioning phase may be used prior to operating the high voltage terminal, whereby a voltage is applied to the conductive mesh so as to attract particles toward the particle trap.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: August 16, 2011
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Stephen E. Krause, Russell J. Low, Kasegn D. Tekletsadik
  • Publication number: 20110180131
    Abstract: A method of implanting a substrate and the resulting apparatus are disclosed. The substrate, which may be a solar cell, is implanted with a p-type dopant. The p-type dopant may be, for example, boron, aluminum, gallium, or indium. Contacts are formed over the p-type region that is formed by the implant. An aluminum layer is formed around these contacts such that a surface of the contacts is still exposed. The implant may be a blanket implant across the entire surface of the substrate or a selective implant into a portion of the substrate. The substrate may be either n-type or p-type.
    Type: Application
    Filed: January 27, 2010
    Publication date: July 28, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: James W. MULLIN, Russell J. Low
  • Publication number: 20110094862
    Abstract: Techniques for making high voltage connections are disclosed. In one particular exemplary embodiment, the techniques may be realized as an electrical switch. The electrical switch may comprise a component extending from a first electrical contact to a second electrical contact. The component may also comprise a non-conductive section and a conductive section. In a first mode of operation, at least a portion of the non-conductive section may be positioned between the two electrical contacts to insulate the two electrical contacts. In a second mode of operation, the conductive section may be positioned between the two electrical contacts to connect the two electrical contacts.
    Type: Application
    Filed: January 3, 2011
    Publication date: April 28, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Douglas E. MAY, Kasegn D. Tekletsadik, Eric Hermanson, Piotr R. Lubicki, Russell J. Low, Joseph C. Olson, Stephen E. Krause
  • Publication number: 20110094798
    Abstract: Methods of interfacing parts in a high voltage environment and related structures are disclosed. A method comprises: providing a first part and a second part; and interfacing the first part and the second part to create a first substantially zero electrical field area at a first outer extent of an interface between the first and second parts and a reduced electrical field area in a different portion of the interface.
    Type: Application
    Filed: January 3, 2011
    Publication date: April 28, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Russell J. Low, Kasegn D. Tekletsadik, Anthony Renau, Piotr R. Lubicki, D. Jeffrey Lischer, Steve Krause, Eric Hermanson, Doug E. May
  • Publication number: 20110089342
    Abstract: Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be achieved using a mask for processing the substrate. The mask may be incorporated into a substrate processing system such as, for example, an ion implantation system. The mask may comprise a first base; and a plurality of fingers spaced apart from one another to define one or more gaps.
    Type: Application
    Filed: April 7, 2010
    Publication date: April 21, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Kevin M. Daniels, Russell J. Low, Benjamin B. Riordon
  • Publication number: 20110089343
    Abstract: Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for processing a substrate. The method may comprise directing an ion beam comprising a plurality of ions along an ion beam path, from an ion source to the substrate; disposing at least a portion of a mask in the ion beam path, between the ion source and the substrate; and translating one of the substrate and the mask relative to other one of the substrate and the mask.
    Type: Application
    Filed: April 7, 2010
    Publication date: April 21, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Kevin M. Daniels, Russell J. Low, Benjamin B. Riordon
  • Publication number: 20110092059
    Abstract: Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be achieved using a mask for processing the substrate. The mask may be incorporated into a substrate processing system such as, for example, an ion implantation system. The mask may comprise one or more first apertures disposed in a first row; and one or more second apertures disposed in a second row, each row extending along a width direction of the mask, wherein the one or more first apertures and the one or more second apertures are non-uniform.
    Type: Application
    Filed: April 7, 2010
    Publication date: April 21, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Kevin M. Daniels, Russell J. Low, Nicholas P.T. Bateman, Benjamin B. Riordon
  • Publication number: 20110056746
    Abstract: An apparatus includes a conductive structure and an insulated conductor disposed proximate an exterior portion of the conductive structure to modify an electric field about the conductive structure. The insulated conductor has an insulator with a dielectric strength greater than 75 kilovolts (kV)/inch disposed about a conductor.
    Type: Application
    Filed: March 2, 2010
    Publication date: March 10, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Kasegn D. Tekletsadik, Russell J. Low
  • Publication number: 20110031408
    Abstract: In an ion implanter, an ion current measurement device is disposed behind a mask co-planarly with respect to a surface of a target substrate as if said target substrate was positioned on a platen. The ion current measurement device is translated across the ion beam. The current of the ion beam directed through a plurality of apertures of the mask is measured using the ion current measurement device. In this manner, the position of the mask with respect to the ion beam as well as the condition of the mask may be determined based on the ion current profile measured by the ion current measurement device.
    Type: Application
    Filed: July 28, 2010
    Publication date: February 10, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Benjamin B. Riordon, Nicholas P.T. Bateman, William T. Weaver, Russell J. Low
  • Patent number: 7863520
    Abstract: Methods of interfacing parts in a high voltage environment and related structures are disclosed. A method comprises: providing an insulation medium between a first part and a second part in a high voltage environment; and interfacing the first part and the second part by compressing the first part and the second part against the insulation medium.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: January 4, 2011
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Russell J. Low, Kasegn D. Tekletsadik, Anthony Renau, Piotr R. Lubicki, D. Jeffrey Lischer, Steve Krause, Eric Hermanson, Doug E. May
  • Patent number: 7863531
    Abstract: Techniques for making high voltage connections are disclosed. In one particular exemplary embodiment, the techniques may be realized as an electrical switch. The electrical switch may comprise a component extending from a first electrical contact to a second electrical contact. The component may also comprise a non-conductive section and a conductive section. In a first mode of operation, at least a portion of the non-conductive section may be positioned between the two electrical contacts to insulate the two electrical contacts. In a second mode of operation, the conductive section may be positioned between the two electrical contacts to connect the two electrical contacts.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: January 4, 2011
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Douglas E. May, Kasegn D. Tekletsadik, Eric Hermanson, Piotr R. Lubicki, Russell J. Low, Joseph C. Olson, Stephen E. Krause
  • Patent number: 7820986
    Abstract: Techniques for controlling a charged particle beam are disclosed. In one particular exemplary embodiment, the techniques may be realized as a charged particle acceleration/deceleration system. The charged particle acceleration/deceleration system may comprise an acceleration column. The acceleration column may comprise a plurality of electrodes having apertures through which a charged particle beam may pass. The charged particle acceleration/deceleration system may also comprise a plurality of resistors electrically coupled to the plurality of electrodes. The charged particle acceleration/deceleration system may further comprise a plurality of switches electrically coupled to the plurality of electrodes and the plurality of resistors, each of the plurality of switches may be configured to be selectively switched respectively in a plurality of operation modes.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: October 26, 2010
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Piotr R. Lubicki, Russell J. Low, Joseph C. Olson, Anthony Renau
  • Patent number: 7821213
    Abstract: Techniques for controlling a charged particle beam are disclosed. In one particular exemplary embodiment, the techniques may be realized as a charged particle acceleration/deceleration system. The charged particle acceleration/deceleration system may comprise an accelerator column, which may comprise a plurality of electrodes. The plurality of electrodes may have apertures through which a charged particle beam may pass. The charged particle acceleration/deceleration system may also comprise a voltage grading system. The voltage grading system may comprise a first fluid reservoir and a first fluid circuit. The first fluid circuit may have conductive connectors connecting to at least one of the plurality of electrodes. The voltage grading system may further comprise fluid in the first fluid circuit. The fluid may have an electrical resistance.
    Type: Grant
    Filed: October 1, 2007
    Date of Patent: October 26, 2010
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Piotr R. Lubicki, Russell J. Low, Stephen E. Krause, Frank Sinclair
  • Patent number: 7799999
    Abstract: Insulated conducting devices and related methods are disclosed. An insulated conducting device for a voltage structure comprises: a conductor connected to a voltage; and multiple insulation segments enclosing the conductor, the multiple insulation segments interfacing with one another.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: September 21, 2010
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Kasegn D. Tekletsadik, Steve Krause, Eric Hermanson, Russell J. Low
  • Publication number: 20100197125
    Abstract: An improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for processing a substrate. The method may comprise ion implanting a substrate disposed downstream of the ion source with ions generated in an ion source; and disposing a first portion of a mask in front of the substrate to expose the first portion of the mask to the ions, the mask being supported by the first and second mask holders, the mask further comprising a second portion wound in the first mask holder.
    Type: Application
    Filed: January 28, 2010
    Publication date: August 5, 2010
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOICTES, INC.
    Inventors: Russell J. Low, William Weaver, Nicholas P.T. Bateman, Atul Gupta
  • Publication number: 20100184243
    Abstract: A method of fabricating a workpiece is disclosed. A material defining apertures is applied to a workpiece. A species is introduced to the workpiece through the apertures and the material is removed. For example, the material may be evaporated, may form a volatile product with a gas, or may dissolve when exposed to a solvent. The species may be introduced using, for example, ion implantation or gaseous diffusion.
    Type: Application
    Filed: January 19, 2010
    Publication date: July 22, 2010
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Russell J. LOW, Julian G. Blake, Frank Sinclair
  • Patent number: 7675046
    Abstract: An apparatus includes a conductive structure and an insulated conductor disposed proximate an exterior portion of the conductive structure to modify an electric field about the conductive structure. The insulated conductor has an insulator with a dielectric strength greater than 75 kilovolts (kV)/inch disposed about a conductor. An ion implanter is also provided. The ion implanter includes an ion source configured to provide an ion beam, a terminal structure defining a cavity, the ion source at least partially disposed within the cavity, and an insulated conductor. The insulated conductor is disposed proximate an exterior portion of the terminal structure to modify an electric field about the terminal structure. The insulated conductor has an insulator with a dielectric strength greater than 75 kV/inch disposed about a conductor.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: March 9, 2010
    Assignee: Varian Semiconductor Equipment Associates, Inc
    Inventors: Kasegn D. Tekletsadik, Russell J. Low
  • Publication number: 20090242793
    Abstract: Liner elements to protect the ion source housing and also increase the power efficiency of the ion source are disclosed. Two liner elements, preferably constructed from tungsten, are inserted into the ion source chamber, one placed against each of the two sidewalls. These inserts are electrically biased so as to induce an electrical field that is perpendicular to the applied magnetic field. Such an arrangement has been unexpectedly found to increase the life of not only the ion chamber housing, but also the indirectly heated cathode (IHC) and the repeller. In addition, the use of these biased liner elements also improved the power efficiency of the ion source; allowing more ions to be generated at a given power level, or an equal number of ions to be generated at a lower power level.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 1, 2009
    Inventors: Russell J. Low, Jay T. Scheuer, Alexander S. Perel, Craig R. Chaney, Neil J. Bassom