Patents by Inventor Ryo ONODERA

Ryo ONODERA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220291242
    Abstract: A method for assisting the diagnosis of Alzheimer's disease, comprising: measuring an amount of extracellular vesicles having phosphatidylserine and tetraspanin, or the amount of extracellular vesicles having phosphatidylserine and tetraspanin and an amount of extracellular vesicles having tetraspanin, in a biological specimen derived from a subject; and determining that the subject has Alzheimer's disease using the amount of extracellular vesicles having phosphatidylserine and tetraspanin, or a ratio of the amount of extracellular vesicles having phosphatidylserine and tetraspanin to the amount of extracellular vesicles having tetraspanin as an indicator.
    Type: Application
    Filed: May 27, 2022
    Publication date: September 15, 2022
    Applicants: FUJIFILM Wako Pure Chemical Corporation, FUJIFILM Wako Shibayagi Corporation
    Inventors: Takahiro NISHIBU, Naoko IMAWAKA, Kazunari HIRAYASU, Ryo UKEKAWA, Kodai SASAMOTO, Satoshi ONODERA
  • Publication number: 20220283146
    Abstract: A method for assisting the diagnosis of Parkinson's disease, including: measuring an amount of extracellular vesicles having phosphatidylserine and tetraspanin, or the amount of extracellular vesicles having phosphatidylserine and tetraspanin and an amount of extracellular vesicles having tetraspanin, in a biological specimen derived from a subject; and determining that the subject has Parkinson's disease using the amount of extracellular vesicles having phosphatidylserine and tetraspanin, or a ratio of the amount of extracellular vesicles having phosphatidylserine and tetraspanin to the amount of extracellular vesicles having tetraspanin as an indicator.
    Type: Application
    Filed: May 27, 2022
    Publication date: September 8, 2022
    Applicants: FUJIFILM Wako Pure Chemical Corporation, FUJIFILM Wako Shibayagi Corporation
    Inventors: Takahiro NISHIBU, Naoko IMAWAKA, Kazunari HIRAYASU, Ryo UKEKAWA, Kodai SASAMOTO, Satoshi ONODERA
  • Publication number: 20220278137
    Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.
    Type: Application
    Filed: May 18, 2022
    Publication date: September 1, 2022
    Inventors: Hajime WATAKABE, Toshihide JINNAI, Ryo ONODERA, Akihiro HANADA
  • Publication number: 20220246764
    Abstract: The present invention addresses the problem of: realizing a TFT that uses an oxide semiconductor and that is capable of maintaining stable characteristics even in the case where the TFT is miniaturized; and realizing a display device that has high-definition pixels using such a TFT. To solve this problem, the present invention has the following configuration. A semiconductor device including an oxide semiconductor TFT formed using an oxide semiconductor film 109, the semiconductor device being characterized in that: the channel length of the oxide semiconductor TFT is 1.3 to 2.3 ?m; and the sheet resistance of a source region 1092 and a drain region 1091 of the oxide semiconductor film 109 is 1.4 to 20 K?/?.
    Type: Application
    Filed: April 20, 2022
    Publication date: August 4, 2022
    Applicant: Japan Display Inc.
    Inventors: Isao SUZUMURA, Hajime WATAKABE, Akihiro HANADA, Ryo ONODERA, Tomoyuki ITO
  • Publication number: 20220216281
    Abstract: According to one embodiment, in a first concentration of an impurity element contained in a first impurity region, a second concentration of the impurity element contained in a second impurity region, a third concentration of the impurity element contained in a third impurity region, and a fourth concentration of the impurity element contained in a high-concentration impurity region, the third concentration is equal to the fourth concentration, the third concentration is higher than the first concentration, and the first concentration is higher than the second concentration.
    Type: Application
    Filed: January 7, 2022
    Publication date: July 7, 2022
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Toshinari SASAKI, Ryo ONODERA
  • Patent number: 11362113
    Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: June 14, 2022
    Assignee: Japan Display Inc.
    Inventors: Hajime Watakabe, Toshihide Jinnai, Ryo Onodera, Akihiro Hanada
  • Publication number: 20220181493
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a first insulating layer above a polycrystalline silicon semiconductor, forming an oxide semiconductor on the first insulating layer, forming a second insulating layer on the oxide semiconductor, forming contact holes penetrating to the polycrystalline silicon semiconductor in insulating layers including the first insulating layer and the second insulating layer, forming a metal film on the second insulating layer, forming a patterned resist on the metal film, etching the metal film using the resist as a mask, performing ion implantation into the oxide semiconductor without removing the resist, and removing the resist.
    Type: Application
    Filed: December 6, 2021
    Publication date: June 9, 2022
    Applicant: Japan Display Inc.
    Inventors: Kentaro MIURA, Hajime WATAKABE, Ryo ONODERA
  • Publication number: 20220173247
    Abstract: A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and a first metal layer in contact with the oxide semiconductor layer and disposed between the source electrode and the drain electrode at a distance from the source electrode and the drain electrode.
    Type: Application
    Filed: November 9, 2021
    Publication date: June 2, 2022
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Hajime WATAKABE, Takuo KAITOH, Ryo ONODERA
  • Publication number: 20220165826
    Abstract: According to one embodiment, in a display device, a first transistor includes a first semiconductor layer, in which a first source region includes a first region in contact a the first source electrode and a first drain region includes a second region in contact with a first drain electrode, the first source and drain regions, the first region, and the second region each include a first impurity element, and, in a region close to an interface between the first semiconductor layer and a first insulating layer, a concentration of the first impurity element included in the first and second regions is higher than a concentration of the first impurity element included in the first source region and the first drain region.
    Type: Application
    Filed: November 23, 2021
    Publication date: May 26, 2022
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Kentaro MIURA, Hajime WATAKABE, Ryo ONODERA
  • Publication number: 20220140117
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device, includes forming a first insulating film which covers a gate electrode, forming an island-shaped oxide semiconductor in contact with the first insulating film, forming a second insulating film which covers the oxide semiconductor, forming a source electrode in contact with the oxide semiconductor, forming a drain electrode in contact with the oxide semiconductor, forming a third insulating film which covers the source electrode and the drain electrode and forming a channel region between the source electrode and the drain electrode by supplying oxygen from the third insulating film to the oxide semiconductor via the second insulating film.
    Type: Application
    Filed: October 27, 2021
    Publication date: May 5, 2022
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Takuo KAITOH, Ryo ONODERA, Takashi OKADA, Tomoyuki ITO, Toshiki KANEKO
  • Publication number: 20220043316
    Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.
    Type: Application
    Filed: October 21, 2021
    Publication date: February 10, 2022
    Applicant: Japan Display Inc.
    Inventors: Toshihide JINNAI, Hajime WATAKABE, Akihiro HANADA, Ryo ONODERA, lsao SUZUMURA
  • Publication number: 20220029026
    Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.
    Type: Application
    Filed: October 13, 2021
    Publication date: January 27, 2022
    Applicant: Japan Display Inc.
    Inventors: Hajime WATAKABE, Tomoyuki ITO, Toshihide JINNAI, lsao SUZUMURA, Akihiro HANADA, Ryo ONODERA
  • Publication number: 20210405411
    Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.
    Type: Application
    Filed: September 10, 2021
    Publication date: December 30, 2021
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Toshihide JINNAI, Isao SUZUMURA, Hajime WATAKABE, Ryo ONODERA
  • Patent number: 11181792
    Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: November 23, 2021
    Assignee: JAPAN DISPLAY INC.
    Inventors: Toshihide Jinnai, Hajime Watakabe, Akihiro Hanada, Ryo Onodera, Isao Suzumura
  • Patent number: 11177388
    Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: November 16, 2021
    Assignee: JAPAN DISPLAY INC.
    Inventors: Hajime Watakabe, Tomoyuki Ito, Toshihide Jinnai, Isao Suzumura, Akihiro Hanada, Ryo Onodera
  • Publication number: 20210320158
    Abstract: The purpose of the present invention is to increase ON current of the oxide semiconductor thin film transistor. An example of the structure that attains the purpose is: a display device having a substrate and a thin film transistor of an oxide semiconductor formed on the substrate including: a thickness of a source region and a drain region is thicker than a thickness of a channel region of the oxide semiconductor, the channel region has projections at portions contacting the source region and the drain region, a thickness of the projection is thicker than a thickness of the center of the channel region, and a thickness of the projection is thicker than a thickness of the source region and the drain region.
    Type: Application
    Filed: June 23, 2021
    Publication date: October 14, 2021
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Toshihide JINNAI, Isao SUZUMURA, Hajime WATAKABE, Ryo ONODERA
  • Publication number: 20210257402
    Abstract: The present invention provides a technology which realizes a reliable semiconductor device including a photosensor device by preventing pent roofs of edges of a P+ layer from being generated and a metal wiring installed over the P+ layer from coming down while securing the electrical conductivity of the P+ layer. The semiconductor device includes a photosensor including a photodiode formed on a substrate. The photodiode includes: a cathode electrode; a laminated structure that is formed on the cathode electrode and in which an N+ layer, an I layer, and a P+ layer are laminated in this order; an anode electrode formed on the P+ layer; a first insulating film formed so as to cover a portion of the anode electrode and edges of the laminated structure; and a metal wiring connected to the anode electrode. The edges of the laminated structure are formed in forward tapered shapes in a cross-sectional view.
    Type: Application
    Filed: February 4, 2021
    Publication date: August 19, 2021
    Applicant: Japan Display Inc.
    Inventors: Hajime WATAKABE, Akihiro HANADA, Marina MOCHIZUKI, Ryo ONODERA, Fumiya KIMURA, Isao SUZUMURA
  • Publication number: 20210240042
    Abstract: A high definition display device is provided. The display device includes an array substrate, and an opposing substrate. The array substrate has a substrate, and on the substrate, a first pixel having a first color filter and a second pixel having a second color filter disposed adjacent to the first pixel. Each of the first color filter and the second color filter has a first dielectric layer, a transmissive layer disposed on the first dielectric layer, and a second dielectric layer disposed on the transmissive layer. The transmissive layer of the first color filter has a first film thickness, and the transmissive layer of the second color filter has a second film thickness larger than the first film thickness. On the transmissive layer of the second color filter, a first layer different from the transmissive layer is disposed on a side of the transmissive layer of the first color filter. A height of a bottom face of the first layer is equal to the first film thickness.
    Type: Application
    Filed: January 27, 2021
    Publication date: August 5, 2021
    Applicant: Japan Display Inc.
    Inventors: Ryo ONODERA, Hajime WATAKABE, Akihiro HANADA
  • Publication number: 20210074736
    Abstract: The purpose of the present invention is to prevent the TFT in the semiconductor device is shorted by existence of a foreign substance. An example of the structure to solve the problem is: A semiconductor device comprising: a scan line extends in a first direction, a first signal line extends in a second direction, which crosses the first direction, a second signal line extends parallel to the first signal line, an electrode is disposed between the first signal line and the second signal line, wherein a first TFT connects with the second signal line in a vicinity of the second signal line, a second TFT connects with the electrode in a vicinity of the first signal line, the first TFT and the second TFT are formed from oxide semiconductors, the first TFT and the second TFT are connected in series.
    Type: Application
    Filed: August 19, 2020
    Publication date: March 11, 2021
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Toshihide JINNAI, Hajime WATAKABE, Ryo ONODERA
  • Publication number: 20210066351
    Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.
    Type: Application
    Filed: August 6, 2020
    Publication date: March 4, 2021
    Inventors: Hajime WATAKABE, Toshihide JINNAI, Ryo ONODERA, Akihiro HANADA