Patents by Inventor Ryoichi Yamada

Ryoichi Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070191666
    Abstract: [PROBLEMS TO BE SOLVED] To effectively clean up lead-contaminated soil through phytoremediation aiming at decontamination with the use of a plant. [MEANS FOR SOLVING PROBLEMS] A plant species which is rich in oxalic acid is grown in soil contaminated with lead and/or a compound thereof by sowing a seed or transplanting a seedling. After the plant species rich in oxalic acid is allowed to absorb and accumulate lead and/or the compound, the plant is harvested and removed. As the plant rich in oxalic acid, any of plants belonging to the family Polygonaceae, Oxalidaceae, Chenopodiaceae, Araceae, Begoniaceae and Musaceae or a combination thereof is used.
    Type: Application
    Filed: March 10, 2005
    Publication date: August 16, 2007
    Applicant: SATO KOGYO CO., LTD.
    Inventors: Izumi Watanabe, Ryoichi Yamada, Takeshi Uchida
  • Patent number: 6728526
    Abstract: A frequency synthesizer device comprising a PLL circuit (9) and a frequency-division ratio control circuit (5). The PLL circuit (9) includes a phase comparator (1), a low-pass filter (2), a voltage-controlled oscillator (3), and a variable frequency divider (4). The frequency-division ratio control circuit (5) controls the variable frequency divider (4) such that a frequency division ratio of the variable frequency divider (4) is changed in time and a time average value of the frequency division ratio contains a value below a decimal point. Two different signals of an output signal fdiv of the variable frequency divider (4) and an output fdiv2 obtained via a delay element (10) are used as clocks of an accumulator portion (81) in the frequency-division ratio control circuit (5).
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: April 27, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ryoichi Yamada, Shunsuke Hirano, Yasunori Miyahara, Hisashi Adachi, Hisashi Takahashi, Hiroki Kojima
  • Patent number: 6563387
    Abstract: A frequency synthesizer is provided with a prescaler 2 and a counter 3, which output a signal having a frequency generated by frequency-dividing an output signal of a VCO 1; a reference frequency divider 5 for frequency-dividing a frequency of a reference signal of a reference signal source 4; a frequency adjusting meas 9 operated in such that a frequency error between the output signal of the counter 5 and the output signal of the reference frequency divider 5 is detected, and in response to this detection result, such a signal is outputted by which either a capacitor value or an inductor value employed in a resonant circuit of the VCO 1 is switched; and also a bias control means for applying an arbitrary voltage V1 to a control voltage terminal of the VCO 1 so as to bring an output signal of a charge pump 7 into a high impedance state when the frequency adjusting means 9 is operated.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: May 13, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shunsuke Hirano, Ryoichi Yamada, Yasunori Miyahara, Yukio Hiraoka, Hisashi Adachi
  • Patent number: 6342819
    Abstract: In a frequency synthesizer device in which a frequency-division ratio control circuit 6 and other circuits are integrated on the same semiconductor substrate, a power supply 8 for supplying a power to the frequency-division ratio control circuit 6 is provided separately from a power supply 7 for supplying a power to other circuits. A power supply voltage supplied from the power supply 8 to the frequency-division ratio control circuit 6 is set lower than a power supply voltage supplied to other circuits. The noise generated by the frequency-division ratio control circuit 6 can be reduced by setting the power supply voltage lower, and also C/N degradation can be reduced. Since the noises can be suppressed even if the frequency is increased, a lock-up time can be reduced and the lower power consumption can be attained.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: January 29, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Ryoichi Yamada
  • Publication number: 20010052823
    Abstract: A frequency synthesizer is provided with a prescaler 2 and a counter 3, which output a signal having a frequency generated by frequency-dividing an output signal of a VCO 1; a reference frequency divider 5 for frequency-dividing a frequency of a reference signal of a reference signal source 4; a frequency adjusting meas 9 operated in such that a frequency error between the output signal of the counter 5 and the output signal of the reference frequency divider 5 is detected, and in response to this detection result, such a signal is outputted by which either a capacitor value or an inductor value employed in a resonant circuit of the VCO 1 is switched; and also a bias control means for applying an arbitrary voltage V1 to a control voltage terminal of the VCO 1 so as to bring an output signal of a charge pump 7 into a high impedance state when the frequency adjusting means 9 is operated.
    Type: Application
    Filed: May 29, 2001
    Publication date: December 20, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shunsuke Hirano, Ryoichi Yamada, Yasunori Miyahara, Yukio Hiraoka, Hisashi Adachi
  • Publication number: 20010036817
    Abstract: A frequency synthesizer device comprising a PLL circuit (9) and a frequency-division ratio control circuit (5). The PLL circuit (9) includes a phase comparator (1), a low-pass filter (2), a voltage-controlled oscillator (3), and a variable frequency divider (4). The frequency-division ratio control circuit (5) controls the variable frequency divider (4) such that a frequency division ratio of the variable frequency divider (4) is changed in time and a time average value of the frequency division ratio contains a value below a decimal point. Two different signals of an output signal fdiv of the variable frequency divider (4) and an output fdiv2 obtained via a delay element (10) are used as clocks of an accumulator portion (81) in the frequency-division ratio control circuit (5).
    Type: Application
    Filed: February 26, 2001
    Publication date: November 1, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ryoichi Yamada, Shunsuke Hirano, Yasunori Miyahara, Hisashi Adachi, Hisashi Takahashi, Hiroki Kojima
  • Patent number: 6272892
    Abstract: To provide a controller of an automation device in a forging press capable of preventing the occurrence of a phenomenon in which raw materials are progressively transported in a partially lacked state and enhancing forging accuracy productivity, an inlet side transportation device includes a raw material detector for detecting whether a raw material to be supplied to a transfer feeder has been supplied or not and a controller for controlling the feed operation of the transfer feeder.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: August 14, 2001
    Assignee: Sumitomo Heavy Industries, Ltd.
    Inventors: Yutaka Ozaki, Masashi Tado, Ryoichi Yamada, Hironobu Noguchi
  • Patent number: 6105414
    Abstract: A transfer feeder for a forging press includes a pair of parallel feed bars each having article-grasping claws, the feed bars being able to make a three-dimensional movement (i.e., an advance-return movement of the feed bars in a longitudinal direction, a clamping-unclamping movement of the feed bars in a widthwise direction, and a lift-down movement of the feed bars) so as to feed forging workpieces from one step of a pressing process to another. The transfer feeder further includes lift-down devices each for making a lift-down movement relative to a corresponding transfer frame through a lift-down linear-movement mechanism, advance-return devices each for making an advance-return movement relative to a lift-down frame of the associated lift-down device through an advance-return linear movement mechanism, and clamping-unclamping devices each for making a clamping-unclamping movement relative to an advance-return frame of the advance-return device through a clamping-unclamping linear-movement mechanism.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: August 22, 2000
    Assignee: Sumitomo Heavy Industries, Ltd.
    Inventors: Ryoichi Yamada, Kouichi Kondo, Akihiro Ukita
  • Patent number: 5488852
    Abstract: A transfer feeder for hot-forging presses having a clamping mechanism to move two parallel feed bars in the clamp and unclamp directions, an advancing mechanism to move them in the advance and return directions, and a lifting mechanism to raise and lower them. The two feed bars are connected to an inner frame via a pair of parallel links and a pair of supporting links, the inner frame is rockably supported on an intermediate frame in the advance and return directions, the intermediate frame is supported on the outer frame to be freely raised and lowered in relation to the outer frame, the clamping mechanism is so constructed as to rock parallel links in the clamp and unclamp directions, the advancing mechanism is so constructed as to rock the inner frame in relation to the intermediate frame, and the lifting mechanism is so constructed as to raise and lower the intermediate frame in relation to the outer frame.
    Type: Grant
    Filed: June 20, 1994
    Date of Patent: February 6, 1996
    Assignee: Sumitomo Heavy Industries, Ltd.
    Inventors: Junji Nishikawa, Ryoichi Yamada