Patents by Inventor Ryouichi Kajiwara

Ryouichi Kajiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10601158
    Abstract: There is a problem that an oxide film or high resistance abrasion powder is formed at the contact interface due to micro sliding abrasion in a high temperature environment or temperature cycle to increase the contact resistance at the contact portion of a non-noble metal connection terminal. Provided is an in-vehicle electronic module, a connector, and a connection structure thereof, which have the same connection reliability as noble metals even when exposed to a harsh environment and can reduce cost of members.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: March 24, 2020
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Ryouichi Kajiwara, Toshiaki Ishii, Masaru Kamoshida
  • Publication number: 20190027848
    Abstract: There is a problem that an oxide film or high resistance abrasion powder is formed at the contact interface due to micro sliding abrasion in a high temperature environment or temperature cycle to increase the contact resistance at the contact portion of a non-noble metal connection terminal. Provided is an in-vehicle electronic module, a connector, and a connection structure thereof, which have the same connection reliability as noble metals even when exposed to a harsh environment and can reduce cost of members.
    Type: Application
    Filed: December 22, 2016
    Publication date: January 24, 2019
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Ryouichi KAJIWARA, Toshiaki ISHII, Masaru KAMOSHIDA
  • Patent number: 9743539
    Abstract: There is a problem that contact resistance increases due to formation of an oxide film on a contact interface or biting of abrasion powder caused by micro-sliding when a contact connecting portion of a connection terminal including non-noble metal members is exposed to high temperature environment or a repetitious temperature cycle. An object of the present invention is to provide an in-vehicle electronic module that has connection reliability equivalent to that of the conventional in-vehicle electronic module even when being placed in the environment of an engine compartment and can achieve cost reduction by reducing the number of parts and assembly steps.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: August 22, 2017
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Ryouichi Kajiwara, Masaru Kamoshida, Toshiaki Ishii
  • Publication number: 20160309600
    Abstract: There is a problem that contact resistance increases due to formation of an oxide film on a contact interface or biting of abrasion powder caused by micro-sliding when a contact connecting portion of a connection terminal including non-noble metal members is exposed to high temperature environment or a repetitious temperature cycle. An object of the present invention is to provide an in-vehicle electronic module that has connection reliability equivalent to that of the conventional in-vehicle electronic module even when being placed in the environment of an engine compartment and can achieve cost reduction by reducing the number of parts and assembly steps.
    Type: Application
    Filed: November 17, 2014
    Publication date: October 20, 2016
    Inventors: Ryouichi KAJIWARA, Masaru KAMOSHIDA, Toshiaki ISHII
  • Patent number: 7528489
    Abstract: Pb free solder is used in die bonding. A thermal stress reduction plate is disposed between a semiconductor chip and a die pad made of a Cu alloy. The semiconductor chip and the thermal stress reduction plate are joined and the thermal stress reduction plate and the die pad are joined by a joint material of Pb free solder having Sn—Sb—Ag—Cu as its main constituent elements and having a solidus temperature not lower than 270° C. and a liquidus temperature not higher than 400° C. Thus, die bonding can be performed using the Pb free solder without generating any chip crack.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: May 5, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Ryouichi Kajiwara, Kazutoshi Itou, Hidemasa Kagii, Hiroi Oka, Hiroyuki Nakamura
  • Patent number: 7423349
    Abstract: The present invention provides a semiconductor device comprising a semiconductor element and a copper member which are bonded to each other by a bismuth-based (Bi-based) bonding material having its melting temperature of not less than 250° C., wherein silver (Ag) is diffused in a region of the bonding material in the vicinity of an interface thereof to the semiconductor element with an inclination of concentration of the silver from the interface, in order to realize a manufacture of the semiconductor device without using lead (Pb) at low cost.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: September 9, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Shosaku Ishihara, Osamu Ikeda, Ryouichi Kajiwara, Shinji Hiramitsu, Satoshi Matsuyoshi
  • Patent number: 7193319
    Abstract: A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3×10?6/° C. to 8×10?6/° C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250° C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250° C.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: March 20, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Koji Sasaki, Shinji Hiramitsu, Tadaaki Kariya, Satoshi Matsuyoshi, Ryouichi Kajiwara, Shosaku Ishihara
  • Publication number: 20060246304
    Abstract: The present invention provides a semiconductor device comprising a semiconductor element and a copper member which are bonded to each other by a bismuth-based (Bi-based) bonding material having its melting temperature of not less than 250° C., wherein silver (Ag) is diffused in a region of the bonding material in the vicinity of an interface thereof to the semiconductor element with an inclination of concentration of the silver from the interface, in order to realize a manufacture of the semiconductor device without using lead (Pb) at low cost.
    Type: Application
    Filed: April 27, 2006
    Publication date: November 2, 2006
    Inventors: Shosaku Ishihara, Osamu Ikeda, Ryouichi Kajiwara, Shinji Hiramitsu, Satoshi Matsuyoshi
  • Publication number: 20060214291
    Abstract: A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3×10?6/° C. to 8×10?6/° C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250° C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250° C.
    Type: Application
    Filed: November 29, 2005
    Publication date: September 28, 2006
    Inventors: Koji Sasaki, Shinji Hiramitsu, Tadaaki Kariya, Satoshi Matsuyoshi, Ryouichi Kajiwara, Shosaku Ishihara
  • Publication number: 20060151889
    Abstract: Pb free solder is used in die bonding. A thermal stress reduction plate is disposed between a semiconductor chip and a die pad made of a Cu alloy. The semiconductor chip and the thermal stress reduction plate are joined and the thermal stress reduction plate and the die pad are joined by a joint material of Pb free solder having Sn—Sb—Ag—Cu as its main constituent elements and having a solidus temperature not lower than 270° C. and a liquidus temperature not higher than 400° C. Thus, die bonding can be performed using the Pb free solder without generating any chip crack.
    Type: Application
    Filed: January 4, 2006
    Publication date: July 13, 2006
    Inventors: Ryouichi Kajiwara, Kazutoshi Itou, Hidemasa Kagii, Hiroi Oka, Hiroyuki Nakamura