Patents by Inventor Sa Yoon Kang

Sa Yoon Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7599193
    Abstract: A tape circuit substrate includes a base film with first wiring and second wiring disposed on the base film. The first wiring extends into a chip mount portion through a first side and bends within the chip mount portion toward a second side. The second wiring extends into the chip mount portion through a third side and bends within the chip mount portion toward the second side. The first, second, and third sides are different sides of the chip mount portion. Thus, size and in turn cost of the base film are minimized by arranging wirings within the chip mount portion for further miniaturization of electronic devices, such as a display panel assembly, using the tape circuit substrate.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: October 6, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Ho Park, Sa-Yoon Kang, Si-Hoon Lee
  • Patent number: 7405760
    Abstract: An image pickup device and a manufacturing method thereof. A digital signal processing (DSP) chip is attached on a first surface of a substrate. A CMOS image sensor (CIS) chip is attached on an active surface of the DSP chip. The DSP chip and the CIS chip may be electrically connected to the substrate by wire bonding. A housing kit having a lens configured to transmit an image to the DSP chip may be mounted on the substrate. An inner space between the housing kit and the substrate is not molded, thereby simplifying a manufacturing process and providing a thinner and/or lighter image pickup device.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: July 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Kyo Cho, Sa Yoon Kang, Young Hoon Ro, Young Shin Kwon
  • Publication number: 20080128902
    Abstract: A semiconductor chip, having an active surface including a peripheral area and a central area, presents a connection area formed on a portion of the peripheral area. The semiconductor chip includes output pads formed in the peripheral area of the active surface and input pads formed in the central area of the active surface. The input pads may be connected to wiring patterns of a TAB tape passing over the connection area.
    Type: Application
    Filed: January 9, 2008
    Publication date: June 5, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ye-Chung CHUNG, Dong-Han KIM, Sa-Yoon KANG
  • Patent number: 7375426
    Abstract: A semiconductor package includes a semiconductor chip, a circuit board at which a wire pattern is formed, and a metal structure including a portion inserted through an opening of the circuit board and upon which the semiconductor chip rests. With the semiconductor chip in direct contact with the metal structure, thermal characteristics improve. With the circuit board supported by the metal structure, mechanical stability improves.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: May 20, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Suk-Chae Kang, Si-Hoon Lee, Sa-Yoon Kang, Dong-Han Kim, Yun-Hyeok Im, Gu-Sung Kim
  • Publication number: 20080081456
    Abstract: A chip-on-board (COB) package has a flip chip assembly structure and is used for an integrated circuit (IC) card. The COB package has conductive patterns as contact terminals on an outer surface of a non-conductive film, and an IC chip on an inner surface of the film. The film has a number of holes through which the conductive patterns are partly exposed. A number of conductive bumps on an active surface of the IC chip face the inner surface of the film and enter corresponding holes in the non-conductive film to mechanically join and electrically couple to the conductive patterns. The disclosed COB package and a related manufacturing method allow a reduction in production cost, simplified process, better electrical connections, and improved reliability.
    Type: Application
    Filed: November 16, 2007
    Publication date: April 3, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Han KIM, Sa-Yoon KANG, Seok-Won LEE
  • Patent number: 7339262
    Abstract: A tape circuit substrate and semiconductor apparatus employing the same, and a method for forming a tape circuit substrate may reduce or eliminate electromagnetic interference (EMI) and provide a substrate or apparatus which can supply a more stable power supply voltage. The tape circuit substrate may include an insulation film and a wiring pattern formed on the insulation film to define an electronic device-mounting region and including a ground electrode. The tape circuit substrate may include a ground electrode pattern formed at the electronic device-mounting region so as to be insulated from the wiring pattern, except where the ground electrode pattern is connected to the ground electrode.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: March 4, 2008
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Dae-Woo Son, Sa-Yoon Kang, Kwan-Jai Lee
  • Patent number: 7329597
    Abstract: A semiconductor chip, having an active surface including a peripheral area and a central area, presents a connection area formed on a portion of the peripheral area. The semiconductor chip includes output pads formed in the peripheral area of the active surface and input pads formed in the central area of the active surface. The input pads may be connected to wiring patterns of a TAB tape passing over the connection area.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: February 12, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ye-Chung Chung, Dong-Han Kim, Sa-Yoon Kang
  • Publication number: 20080029923
    Abstract: A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate fine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.
    Type: Application
    Filed: October 15, 2007
    Publication date: February 7, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-Sei CHOI, Sa-Yoon KANG, Yong-Hwan KWON, Chung-Sun LEE
  • Publication number: 20080023822
    Abstract: A Chip on Flexible Printed Circuit (COF) type semiconductor package may include a flexible film, a semiconductor IC chip on the flexible film, and a heating pad on the flexible film.
    Type: Application
    Filed: July 20, 2007
    Publication date: January 31, 2008
    Inventors: Si-Hoon Lee, Sa-Yoon Kang, Kyoung-Sei Choi
  • Patent number: 7315086
    Abstract: A chip-on-board (COB) package has a flip chip assembly structure and is used for an integrated circuit (IC) card. The COB package has conductive patterns as contact terminals on an outer surface of a non-conductive film, and an IC chip on an inner surface of the film. The film has a number of holes through which the conductive patterns are partly exposed. A number of conductive bumps on an active surface of the IC chip face the inner surface of the film and enter corresponding holes in the non-conductive film to mechanically join and electrically couple to the conductive patterns. The disclosed COB package and a related manufacturing method allow a reduction in production cost, simplified process, better electrical connections, and improved reliability.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: January 1, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Han Kim, Sa-Yoon Kang, Seok-Won Lee
  • Patent number: 7309916
    Abstract: A semiconductor package includes a metal plate in which one or more openings are formed, the metal plate mounting a semiconductor chip and a printed wire pattern substrate, e.g. a PCB, mounting one or more decoupling capacitors. The semiconductor chip is in direct contact with the metal plate to improve thermal characteristics, and the substrate is supported by the metal plate to increase mechanical stability of the package. The one or more openings in the metal plate accommodate the passing therethrough of plural pins electrically connected via the printed wire pattern substrate to the semiconductor chip. The semiconductor package can be usefully applied to a digital micro-mirror device (DMD) semiconductor package for use in a projection display device.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: December 18, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Suk-Chae Kang, Sa-Yoon Kang, Dong-Han Kim, Si-Hoon Lee
  • Patent number: 7299547
    Abstract: A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern, thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate fine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: November 27, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Sei Choi, Sa-Yoon Kang, Yong-Hwan Kwon, Chung-Sun Lee
  • Publication number: 20070126110
    Abstract: A circuit film having film bumps is provided for a film package. An IC chip is mechanically joined and electrically coupled to the circuit film through the film bumps instead of conventional chip bumps. In a fabrication method, a base film is partially etched by a laser to create an etched area that defines raised portion relatively raised from the etched area. Then a circuit pattern is selectively formed on the base film, partly running over the raised portions. The raised portion and the overlying circuit pattern constitute the film bumps having a height not greater than the height of the circuit film.
    Type: Application
    Filed: February 2, 2007
    Publication date: June 7, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-Hwan KWON, Sa-Yoon KANG, Chung-Sun LEE, Kyoung-Sei CHOI
  • Patent number: 7208343
    Abstract: A semiconductor chip with conductive wiring that is routed to the edge of the substrate from the chip's backside. A plurality of such semiconductor chips are stacked and electrically connected using a wiring element that is a circuit board or conductive adhesive strips. The wiring element connects the conductive wiring of each semiconductor chip along the sides of the chips to the package substrate. A method of manufacturing the semiconductor chip includes batch manufacturing a plurality of die on a wafer with an active surface on which a plurality bonding pads are formed, and a backside which is the rear side of the active surface; forming a circuit groove on the backside; applying conductive wiring on the circuit groove using a conductive material; and separating the wafer into a plurality of semiconductor chips.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: April 24, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Hee Song, Sa Yoon Kang, Min Young Son
  • Publication number: 20070057360
    Abstract: Semiconductor package films and a display module comprising a packaged semiconductor device punched from a semiconductor package film are provided. In one embodiment, the invention provides a semiconductor package film comprising a base film comprising a plurality of semiconductor device regions, an intermediate region disposed on a first surface of the base film and disposed between two semiconductor device regions, and a reinforcing member attached to a second surface of the base film opposite the first surface of the base film and attached opposite the intermediate region. Each semiconductor device region comprises a semiconductor mounting region adapted to receive a semiconductor chip, and first and second metal line regions.
    Type: Application
    Filed: September 8, 2006
    Publication date: March 15, 2007
    Inventors: Si-hoon Lee, Jae-cheon Doh, Sa-yoon Kang
  • Patent number: 7190073
    Abstract: A circuit film having film bumps is provided for a film package. An IC chip is mechanically joined and electrically coupled to the circuit film through the film bumps instead of conventional chip bumps. In a fabrication method, a base film is partially etched by a laser to create an etched area that defines raised portion relatively raised from the etched area. Then a circuit pattern is selectively formed on the base film, partly running over the raised portions. The raised portion and the overlying circuit pattern constitute the film bumps having a height not greater than the height of the circuit film.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: March 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Hwan Kwon, Sa-Yoon Kang, Chung-Sun Lee, Kyoung-Sei Choi
  • Patent number: 7183660
    Abstract: A tape circuit substrate comprises a base film made of an insulating material, and a wiring pattern layer which is formed on the base film and has first leads that are connected to electrode pads arranged near a periphery of a semiconductor chip and second leads that are connected to electrode pads arranged near the center of the semiconductor chip. The semiconductor chip package comprises a semiconductor chip electrically bonded to the tape circuit substrate through chip bumps. In such a case, each of the leads is configured such that a tip end thereof to be bonded to the electrode pad has a width larger than that of a body portion thereof. According to the present invention, since the interval between the lead and the electrode pad can be made even narrower, a fine pitch semiconductor device can be realized.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: February 27, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Si-Hoon Lee, Sa-Yoon Kang, Dong-Han Kim
  • Publication number: 20070013857
    Abstract: A rectangular display driver integrated circuit device adapted for use with a flat panel display (FPD) device is disclosed and comprises, a plurality of input pads arranged in a central portion of the display driver integrated circuit device, and a plurality of output pads arranged along edges of all four sides of the display driver integrated circuit device. An associated film, film package, and flat panel display (FPD) module adapted to receive the display driver integrated circuit device are also disclosed.
    Type: Application
    Filed: July 18, 2006
    Publication date: January 18, 2007
    Inventors: Ye-chung Chung, Sa-yoon Kang
  • Publication number: 20060267164
    Abstract: A device is provided in which a glass panel having beveled edge is flexibly connected to a TAB package. The outer lead portions of the TAB package include an end portion of first width connected to a connection pattern on the glass panel, a terminal portion having a second width greater than the first width, and a transition portion having a width that varies between the first and second widths. When the TAB package is connected the transition portion of the respective outer lead portions are disposed over the beveled edge of the glass panel.
    Type: Application
    Filed: April 4, 2006
    Publication date: November 30, 2006
    Inventors: Ye-chung Chung, Sa-yoon Kang
  • Publication number: 20060268213
    Abstract: Provided are a flexible film package module and a method of manufacturing the same that can be adapted for manufacture at lower cost and/or to adapt the characteristics of the flexible film package module for specific applications. The lower-cost flexible film package module includes a tape film that combines both a first insulating substrate, typically formed from a higher-cost polyimide material, and a second insulating substrate, typically formed from an insulating material or materials that are less expensive and/or provide modified performance when compared with the first insulating material. Both the first and second substrates will include complementary circuit patterns that will be electrically and physically connected to allow the composite substrate to function as a unitary substrate. The first and second substrates will also include connection regions that may be adapted for connection to printed circuit boards and/or electronic devices such as liquid crystal displays.
    Type: Application
    Filed: August 10, 2006
    Publication date: November 30, 2006
    Inventors: Sa-Yoon Kang, Dong-Han Kim, Ye-Chung Chung