Patents by Inventor Sadamichi Takakusaki
Sadamichi Takakusaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220375833Abstract: Implementations of semiconductor packages may include a metallic baseplate, a first insulative layer coupled to the metallic baseplate, a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the electrically insulative, one or more semiconductor devices coupled to each one of the first plurality of metallic traces, a second plurality of metallic traces coupled to the one or more semiconductor devices, and a second insulative layer coupled to the metallic traces of the second plurality of metallic traces.Type: ApplicationFiled: August 1, 2022Publication date: November 24, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng LIN, Roger Paul STOUT, Chee Hiong CHEW, Sadamichi TAKAKUSAKI, Francis J. CARNEY
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Publication number: 20220369468Abstract: A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.Type: ApplicationFiled: July 29, 2022Publication date: November 17, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng LIN, Sadamichi TAKAKUSAKI
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Patent number: 11437304Abstract: Implementations of semiconductor packages may include a metallic baseplate, a first insulative layer coupled to the metallic baseplate, a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the electrically insulative, one or more semiconductor devices coupled to each one of the first plurality of metallic traces, a second plurality of metallic traces coupled to the one or more semiconductor devices, and a second insulative layer coupled to the metallic traces of the second plurality of metallic traces.Type: GrantFiled: February 23, 2017Date of Patent: September 6, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng Lin, Roger Paul Stout, Chee Hiong Chew, Sadamichi Takakusaki, Francis J. Carney
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Patent number: 11419217Abstract: A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.Type: GrantFiled: January 11, 2018Date of Patent: August 16, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng Lin, Sadamichi Takakusaki
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Patent number: 11101139Abstract: An etched nickel plated substrate and related methods is disclosed. Specific implementations may include providing a dielectric layer, coupling a layer of copper with a first side of the dielectric layer, plating a first side of the layer of copper with a layer of nickel; forming a patterned layer on the layer of nickel, and spray etching the layer of nickel using an etchant. The method may include holding the etchant on the dielectric layer for a predetermined period of time, and while holding the etchant, etching substantially only the layer of nickel until the layer of nickel may be substantially coextensive with a perimeter of each of a plurality of traces in the layer of copper.Type: GrantFiled: July 3, 2019Date of Patent: August 24, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Sadamichi Takakusaki
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Publication number: 20200365415Abstract: An etched nickel plated substrate and related methods is disclosed. Specific implementations may include providing a dielectric layer, coupling a layer of copper with a first side of the dielectric layer, plating a first side of the layer of copper with a layer of nickel; forming a patterned layer on the layer of nickel, and spray etching the layer of nickel using an etchant. The method may include holding the etchant on the dielectric layer for a predetermined period of time, and while holding the etchant, etching substantially only the layer of nickel until the layer of nickel may be substantially coextensive with a perimeter of each of a plurality of traces in the layer of copper.Type: ApplicationFiled: July 3, 2019Publication date: November 19, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Sadamichi TAKAKUSAKI
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Publication number: 20180132358Abstract: A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.Type: ApplicationFiled: January 11, 2018Publication date: May 10, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng Lin, Sadamichi Takakusaki
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Patent number: 9883595Abstract: A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.Type: GrantFiled: July 11, 2016Date of Patent: January 30, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng Lin, Sadamichi Takakusaki
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Publication number: 20170162481Abstract: Implementations of semiconductor packages may include a metallic baseplate, a first insulative layer coupled to the metallic baseplate, a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the electrically insulative, one or more semiconductor devices coupled to each one of the first plurality of metallic traces, a second plurality of metallic traces coupled to the one or more semiconductor devices, and a second insulative layer coupled to the metallic traces of the second plurality of metallic traces.Type: ApplicationFiled: February 23, 2017Publication date: June 8, 2017Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng LIN, Roger Paul STOUT, Chee Hiong CHEW, Sadamichi TAKAKUSAKI, Francis J. CARNEY
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Publication number: 20160324008Abstract: A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.Type: ApplicationFiled: July 11, 2016Publication date: November 3, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng LIN, Sadamichi TAKAKUSAKI
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Publication number: 20160323997Abstract: A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.Type: ApplicationFiled: July 11, 2016Publication date: November 3, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng LIN, Sadamichi TAKAKUSAKI
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Patent number: 9408301Abstract: A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.Type: GrantFiled: November 6, 2014Date of Patent: August 2, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng Lin, Sadamichi Takakusaki
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Patent number: 9397017Abstract: A semiconductor package. Implementations may include a substrate including a metallic baseplate coupled with an electrically insulative layer and a plurality of metallic traces coupled to the electrically insulative layer on a surface of the electrically insulative layer opposing a surface of the electrically insulative layer coupled to the metallic baseplate. The plurality of metallic traces may include at least two different trace thicknesses, where the trace thicknesses are measured perpendicularly to the surface of the electrically insulative layer coupled with the metallic baseplate. The package may include at least one semiconductor device coupled to the substrate, a mold compound that encapsulates the power electronic device and at least a portion of the substrate, and at least one package electrical connector coupled with the substrate.Type: GrantFiled: August 3, 2015Date of Patent: July 19, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng Lin, Sadamichi Takakusaki
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Publication number: 20160133533Abstract: A semiconductor package. Implementations may include a substrate including a metallic baseplate coupled with an electrically insulative layer and a plurality of metallic traces coupled to the electrically insulative layer on a surface of the electrically insulative layer opposing a surface of the electrically insulative layer coupled to the metallic baseplate. The plurality of metallic traces may include at least two different trace thicknesses, where the trace thicknesses are measured perpendicularly to the surface of the electrically insulative layer coupled with the metallic baseplate. The package may include at least one semiconductor device coupled to the substrate, a mold compound that encapsulates the power electronic device and at least a portion of the substrate, and at least one package electrical connector coupled with the substrate.Type: ApplicationFiled: August 3, 2015Publication date: May 12, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng LIN, Sadamichi TAKAKUSAKI
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Publication number: 20160135293Abstract: A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.Type: ApplicationFiled: November 6, 2014Publication date: May 12, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng Lin, Sadamichi Takakusaki
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Patent number: 8203848Abstract: Provided is a simplified structure of a circuit device in which a power element generating a large amount of heat is incorporated. The circuit device according to the present invention includes: a circuit board whose surface is covered with an insulating layer; a conductive pattern formed on the surface of the insulating layer; a circuit element electrically connected to the conductive pattern; and a lead connected to a pad formed of the conductive pattern. Furthermore, a power element is fixed to the top surface of a land portion formed of a part of the lead. Accordingly, the land portion serves as a heat sink, thereby contributing to heat dissipation.Type: GrantFiled: August 30, 2006Date of Patent: June 19, 2012Assignee: SANYO Electric Co., Ltd.Inventors: Sadamichi Takakusaki, Noriaki Sakamoto
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Patent number: 8183090Abstract: To reduce connection defects between a circuit substrate provided on a core substrate and a circuit to be mounted thereon, thereby improving reliability as a multilayered device mounting substrate. The device mounting substrate includes: a first circuit substrate composed of a substrate, an insulating layer formed on this substrate, and a first conductive layer (including conductive parts) formed on this insulating layer; and a second circuit substrate mounted on the first circuit substrate, being composed of a base, a second conductive layer (including conductive parts) formed on the bottom of the base, and a third conductive layer (including conductive parts) formed on the top of the base. Here, the first and second circuit substrates are bonded by pressure so that the first and second conductive parts are laminated and embedded together into the insulating layer.Type: GrantFiled: August 13, 2010Date of Patent: May 22, 2012Assignee: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Hideki Mizuhara, Takaya Kusabe, Sadamichi Takakusaki
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Publication number: 20120018201Abstract: Provided are a circuit board easy to process by laser and a manufacturing method thereof A circuit board of the present invention includes a substrate, an insulating layer covering an upper surface of the substrate, and a conductive pattern of a predetermined shape formed on an upper surface of the insulating layer. The insulating layer is made of a resin material highly filled with a filler made of silica. Further, a colorant made of an inorganic material is added to the resin material. Accordingly, when a laser is radiated onto the insulating layer in order to perform cutting and removing processing, the insulating layer is removed because the laser is absorbed by the colored resin material.Type: ApplicationFiled: July 15, 2011Publication date: January 26, 2012Applicant: ON Semiconductor Trading, Ltd.Inventor: Sadamichi TAKAKUSAKI
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Patent number: 7999190Abstract: Provided are: a light emitting module which has an improved heat-dissipating property and whose reflectance reduction is prevented. The light emitting module mainly includes: a metal substrate; a conductive pattern formed on the upper surface of the metal substrate; and a light emitting element disposed on the upper surface of the metal substrate and electrically connected to the conductive pattern. Furthermore, in the light emitting module, an insulating layer is removed in a region where the conductive pattern is not formed, but is left unremoved in a region right below (or covered with) the conductive pattern. In other words, in the region where the conductive pattern is not formed, the upper surface of the metal substrate is not covered with the conductive pattern, and a metal material constituting the metal substrate is exposed.Type: GrantFiled: September 25, 2008Date of Patent: August 16, 2011Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd., Sanyo Consumer Electronics Co., Ltd.Inventors: Sadamichi Takakusaki, Koichiro Ono, Akihisa Matsumoto
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Patent number: 7964957Abstract: A semiconductor device that includes a metal substrate including a top surface, a bottom surface and four side surfaces, a conductive pattern insulated from the metal substrate, and a semiconductor element mounted on and electrically connected to the conductive pattern. The top surface is insulated. Each of the side surfaces of the metal substrate includes a first inclining side surface and a second inclining side surface so as to form a convex shape protruding outwardly between the top surface and the bottom surface of the metal substrate, and the first inclining side surfaces of a pair of two opposing side surfaces are smaller than corresponding first inclining side surfaces of another pair of two opposing side surfaces.Type: GrantFiled: December 23, 2008Date of Patent: June 21, 2011Assignees: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.Inventors: Mitsuru Noguchi, Sadamichi Takakusaki