Patents by Inventor Sadanand V. Deshpande
Sadanand V. Deshpande has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9451684Abstract: An extreme ultraviolet (EUV) radiation source pellet includes at least one metal particle embedded within a heavy noble gas cluster contained within a noble gas shell cluster. The EUV radiation source assembly can be activated by a sequential irradiation of at least one first laser pulse and at least one second laser pulse. Each first laser pulse generates plasma by detaching outer orbital electrons from the at least one metal particle and releasing the electrons into the heavy noble gas cluster. Each second laser pulse amplifies the plasma embedded in the heavy noble gas cluster triggering a laser-driven self-amplifying process. The amplified plasma induces inter-orbital electron transitions in heavy noble gas and other constitute atoms leading to emission of EUV radiation. The laser pulsing units can be combined with a source pellet generation unit to form an integrated EUV source system.Type: GrantFiled: March 22, 2016Date of Patent: September 20, 2016Assignee: International Business Machines CorporationInventors: Daniel A. Corliss, Sadanand V. Deshpande, Veeresh V. Deshpande, Oleg Gluschenkov, Sivarama Krishnan
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Publication number: 20160205757Abstract: An extreme ultraviolet (EUV) radiation source pellet includes at least one metal particle embedded within a heavy noble gas cluster contained within a noble gas shell cluster. The EUV radiation source assembly can be activated by a sequential irradiation of at least one first laser pulse and at least one second laser pulse. Each first laser pulse generates plasma by detaching outer orbital electrons from the at least one metal particle and releasing the electrons into the heavy noble gas cluster. Each second laser pulse amplifies the plasma embedded in the heavy noble gas cluster triggering a laser-driven self-amplifying process. The amplified plasma induces inter-orbital electron transitions in heavy noble gas and other constitute atoms leading to emission of EUV radiation. The laser pulsing units can be combined with a source pellet generation unit to form an integrated EUV source system.Type: ApplicationFiled: March 22, 2016Publication date: July 14, 2016Inventors: Daniel A. Corliss, Sadanand V. Deshpande, Veeresh V. Deshpande, Oleg Gluschenkov, Sivarama Krishnan
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Patent number: 9301381Abstract: An extreme ultraviolet (EUV) radiation source pellet includes at least one metal particle embedded within a heavy noble gas cluster contained within a noble gas shell cluster. The EUV radiation source assembly can be activated by a sequential irradiation of at least one first laser pulse and at least one second laser pulse. Each first laser pulse generates plasma by detaching outer orbital electrons from the at least one metal particle and releasing the electrons into the heavy noble gas cluster. Each second laser pulse amplifies the plasma embedded in the heavy noble gas cluster triggering a laser-driven self-amplifying process. The amplified plasma induces inter-orbital electron transitions in heavy noble gas and other constitute atoms leading to emission of EUV radiation. The laser pulsing units can be combined with a source pellet generation unit to form an integrated EUV source system.Type: GrantFiled: September 12, 2014Date of Patent: March 29, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Daniel A. Corliss, Sadanand V. Deshpande, Veeresh V. Deshpande, Oleg Gluschenkov, Sivarama Krishnan
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Publication number: 20160081174Abstract: An extreme ultraviolet (EUV) radiation source pellet includes at least one metal particle embedded within a heavy noble gas cluster contained within a noble gas shell cluster. The EUV radiation source assembly can be activated by a sequential irradiation of at least one first laser pulse and at least one second laser pulse. Each first laser pulse generates plasma by detaching outer orbital electrons from the at least one metal particle and releasing the electrons into the heavy noble gas cluster. Each second laser pulse amplifies the plasma embedded in the heavy noble gas cluster triggering a laser-driven self-amplifying process. The amplified plasma induces inter-orbital electron transitions in heavy noble gas and other constitute atoms leading to emission of EUV radiation. The laser pulsing units can be combined with a source pellet generation unit to form an integrated EUV source system.Type: ApplicationFiled: September 12, 2014Publication date: March 17, 2016Inventors: Daniel A. Corliss, Sadanand V. Deshpande, Veeresh V. Deshpande, Oleg Gluschenkov, Sivarama Krishnan
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Patent number: 7700425Abstract: A method is provided for forming an SOI MOSFET device with a silicon layer formed on a dielectric layer with a gate electrode stack, with sidewall spacers on sidewalls of the gate electrode stack and raised source/drain regions formed on the surface of the silicon layer. The gate electrode stack comprises a gate electrode formed of polysilicon over a gate dielectric layer formed on the surface of the silicon layer. A thin amorphous silicon cap layer is formed in the top surface of the gate electrode by implanting dopant into the surface thereof. A notch is etched into the periphery of the cap layer. A plug of dielectric material is formed in the notch. The sidewalls of the gate electrode are covered by the sidewall spacers which cover a portion of the plug for the purpose of eliminating the exposure of the gate polysilicon so that formation of spurious epitaxial growth during the formation of raised source/drain regions is avoided.Type: GrantFiled: October 23, 2006Date of Patent: April 20, 2010Assignee: International Business Machines CorporationInventors: Tina J. Wagner, Werner A. Rausch, Sadanand V. Deshpande
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Patent number: 7595010Abstract: Adding at least one non-silicon precursor (such as a germanium precursor, a carbon precursor, etc.) during formation of a silicon nitride, silicon oxide, silicon oxynitride or silicon carbide film improves the deposition rate and/or makes possible tuning of properties of the film, such as tuning of the stress of the film. Also, in a doped silicon oxide or doped silicon nitride or other doped structure, the presence of the dopant may be used for measuring a signal associated with the dopant, as an etch-stop or otherwise for achieving control during etching.Type: GrantFiled: October 26, 2007Date of Patent: September 29, 2009Assignee: International Business Machines CorporationInventors: Ashima B. Chakravarti, Judson Holt, Kevin K. Chan, Sadanand V. Deshpande, Rangarajan Jagannathan
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Patent number: 7479688Abstract: A method for modulating the stress caused by bird beak formation of small width devices by a nitrogen plasma treatment. The nitrogen plasma process forms a nitride liner about the trench walls that serves to prevent the formation of bird beaks in the isolation region during a subsequent oxidation step. In one embodiment, the plasma nitridation process occurs after trench etching, but prior to trench fill. In yet another embodiment, the plasma nitridation process occurs after trench fill. In yet another embodiment, a block mask is formed over predetermined active areas of the etched substrate prior to the plasma nitridation process. This embodiment is used in protecting the PFET device area from the plasma nitridation process thereby providing a means to form a PFET device area in which stress caused by bird beak formation increases the device performance of the PFET.Type: GrantFiled: January 5, 2004Date of Patent: January 20, 2009Assignee: International Business Machines CorporationInventors: Sadanand V. Deshpande, Bruce B. Doris, Werner A. Rausch, James A. Slinkman
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Publication number: 20090008785Abstract: The embodiments of the invention generally relate to an etching process, and more particularly to an etch processing for improving the yield of dielectric contacts on nickel silicides. An oxygen-free feedgas is used in an etching process to reduce or eliminate residuals, including oxidation and consumption of the silicide layer, at the contact surface.Type: ApplicationFiled: February 7, 2008Publication date: January 8, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Scott D. ALLEN, Kenneth A. Bandy, Sadanand V. Deshpande, Richard Wise
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Publication number: 20080188089Abstract: A method for reducing top notching effects in pre-doped gate structures includes subjecting an etched, pre-doped gate stack structure to a re-oxidation process, the re-oxidation process comprising a radical assisted re-oxidation process so as to result in the formation of an oxide layer over vertical sidewall and horizontal top surfaces of the etched gate stack structure. The resulting oxide layer has a substantially uniform thickness independent of grain boundary orientations of the gate stack structure and independent of the concentration and location of dopant material present therein.Type: ApplicationFiled: February 6, 2007Publication date: August 7, 2008Applicant: International Business Machines CorporationInventors: Anthony I. Chou, Sadanand V. Deshpande, Renee T. Mo, Shreesh Narasimha, Katsunori Onishi, Dominic Schepis
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Patent number: 7407875Abstract: Embodiments of the present invention provide a method of fabricating a contact structure in a layer of dielectric material between a semiconductor device and a back-end-of-line interconnect. The method includes creating at least one contact opening in said layer of dielectric material; forming a first TiN film through a chemical-vapor deposition process, said first TiN film lining said contact opening; and forming a second TiN film through a physical vapor deposition process, said second TiN film lining said first TiN film. A contact structure fabricated according to embodiments of the invention is also provided.Type: GrantFiled: September 6, 2006Date of Patent: August 5, 2008Assignee: International Business Machines CorporationInventors: Keith Kwong Hon Wong, Patrick W. DeHaven, Sadanand V. Deshpande, Anita Madan
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Publication number: 20080156257Abstract: A cluster tool is provided for the implementing of a clustered and integrated surface pre-cleaning of the surface of semiconductor devices. More particularly, there is provided a cluster tool and a method of utilization thereof in an integrated semiconductor device surface pre-cleaning, which is directed towards a manufacturing aspect in which a chamber for performing a dry processing chemical oxide removal (COR) on the semiconductor device surface is clustered with other tools, such as a metal deposition tool for silicide or contact formation, including the provision of a vacuum transfer module in the cluster tool.Type: ApplicationFiled: October 16, 2007Publication date: July 3, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Sadanand V. Deshpande, Ying Li, Kevin E. Mello, Renee T. Mo, Wesley C. Natzle, Kirk D. Peterson, Robert J. Purtell
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Patent number: 7361611Abstract: Adding at least one non-silicon precursor (such as a germanium precursor, a carbon precursor, etc.) during formation of a silicon nitride, silicon oxide, silicon oxynitride or silicon carbide film improves the deposition rate and/or makes possible tuning of properties of the film, such as tuning of the stress of the film. Also, in a doped silicon oxide or doped silicon nitride or other doped structure, the presence of the dopant may be used for measuring a signal associated with the dopant, as an etch-stop or otherwise for achieving control during etching.Type: GrantFiled: February 8, 2006Date of Patent: April 22, 2008Assignee: International Business Machines CorporationInventors: Ashima B. Chakravarti, Judson Holt, Kevin K. Chan, Sadanand V. Deshpande, Rangarajan Jagannathan
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Patent number: 7354867Abstract: The embodiments of the invention generally relate to an etching process, and more particularly to an etch processing for improving the yield of dielectric contacts on nickel silicides. An oxygen-free feedgas is used in an etching process to reduce or eliminate residuals, including oxidation and consumption of the silicide layer, at the contact surface. The contact resistance at contact surface is reduced, thereby improving the performance of the device.Type: GrantFiled: February 3, 2005Date of Patent: April 8, 2008Assignee: International Business Machines CorporationInventors: Scott D. Allen, Kenneth A. Bandy, Sadanand V. Deshpande, Richard Wise
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Patent number: 7344983Abstract: A cluster tool is provided for the implementing of a clustered and integrated surface pre-cleaning of the surface of semiconductor devices. More particularly, there is provided a cluster tool and a method of utilization thereof in an integrated semiconductor device surface pre-cleaning, which is directed towards a manufacturing aspect in which a chamber for performing a dry processing chemical oxide removal (COR) on the semiconductor device surface is clustered with other tools, such as a metal deposition tool for silicide or contact formation, including the provision of a vacuum transfer module in the cluster tool.Type: GrantFiled: March 18, 2005Date of Patent: March 18, 2008Assignee: International Business Machines CorporationInventors: Sadanand V. Deshpande, Ying Li, Kevin E. Mello, Renee T. Mo, Wesley C. Natzle, Kirk D. Peterson, Robert J. Purtell
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Publication number: 20080054326Abstract: Embodiments of the present invention provide a method of fabricating a contact structure in a layer of dielectric material between a semiconductor device and a back-end-of-line interconnect. The method includes creating at least one contact opening in said layer of dielectric material; forming a first TiN film through a chemical-vapor deposition process, said first TiN film lining said contact opening; and forming a second TiN film through a physical vapor deposition process, said second TiN film lining said first TiN film. A contact structure fabricated according to embodiments of the invention is also provided.Type: ApplicationFiled: September 6, 2006Publication date: March 6, 2008Applicant: International Business Machines CorporationInventors: Keith Kwong Hon Wong, Patrick W. DeHaven, Sadanand V. Deshpande, Anita Madan
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Patent number: 7091081Abstract: A method is provided for patterning a semiconductor region, which can be heavily doped. A patterned mask is provided above the semiconductor region. A portion of the semiconductor region exposed by the patterned mask is etched in an environment including a polymerizing fluorocarbon, e.g., a chlorine-free fluorocarbon having a high ratio of carbon to fluorine atoms, and at least one non-polymerizing substance selected from the group consisting of non-polymerizing fluorocarbons, e.g. those having a low ratio of carbon to fluorine atoms, and hydrogenated fluorocarbons. The method preferably passivates the sidewalls of the patterned semiconductor region, such that a lower region of semiconductor material below the patterned region can be directionally etched without eroding the thus passivated patterned region.Type: GrantFiled: May 21, 2004Date of Patent: August 15, 2006Assignee: International Business Machines CorporationInventors: Sadanand V. Deshpande, Rajiv M. Ranade, George K. Worth
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Patent number: 6960510Abstract: A method of forming a structure having sub-lithographic dimensions is provided. The method includes: forming a chamfered mandrel on a substrate, the mandrel having an angled surface; and performing an angled ion implantation to obtain an implanted shadow region in the substrate, the implanted shadow mask having at least one sub-lithographic dimension.Type: GrantFiled: July 1, 2002Date of Patent: November 1, 2005Assignee: International Business Machines CorporationInventors: Sadanand V. Deshpande, Toshiharu Furukawa, David V. Horak, Wesley C. Natzle, Akihisa Sekiguchi, Len Y. Tsou, Qingyun Yang
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Patent number: 6930030Abstract: A method for precise thinning to form a recess to a precise depth in a crystalline silicon layer, which can be used to form various devices, such as MOSFET devices, includes the following steps. Form a patterning mask with a window therethrough over the top surface of the silicon layer. Form an amorphized region in the top surface of the silicon layer below the window. Selectively etch away the amorphized region of the silicon layer to form a recess in the surface of the silicon layer, and remove the patterning mask. In the case of an MOSFET device form a hard mask below the patterning mask with the window extending therethrough. Then create sidewall spacers in the window through the hard mask and form a gate electrode stack in the window. Then remove the hard mask and form the source/drain extensions, halos and regions plus silicide and complete the MOSFET device.Type: GrantFiled: June 3, 2003Date of Patent: August 16, 2005Assignee: International Business Machines CorporationInventors: Werner A. Rausch, Tina J. Wagner, Sadanand V. Deshpande
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Patent number: 6903023Abstract: A method for removing carbon from or stripping a TERA layer. The method includes exposing the TERA layer to a plasma containing an effective amount of nitrogen, and, optionally, oxygen or fluorine. The method is compatible with fluorine based etching systems, and may thus be performed in the same etching system as other etching steps. For example, the method may be performed in the same system as a fluorine based plasma etch for oxide or nitride. The invention includes the method of stripping a TERA layer, etching an oxide layer, and etching a nitride layer in situ in the same etching system. The method is performed at low ion energies to avoid damaging oxide or nitride layers under the TERA film and to provide good selectivity.Type: GrantFiled: September 16, 2002Date of Patent: June 7, 2005Assignee: International Business Machines CorporationInventors: Richard S. Wise, Sadanand V. Deshpande, Wendy Yan, Soctt D. Allen, Arpan P. Mahorowala
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Patent number: 6887798Abstract: A method for modulating the stress caused by bird beak formation of small width devices by a nitrogen plasma treatment. The nitrogen plasma process forms a nitride liner about the trench walls that serves to prevent the formation of bird beaks in the isolation region during a subsequent oxidation step. In one embodiment, the plasma nitridation process occurs after trench etching, but prior to trench fill. In yet another embodiment, the plasma nitridation process occurs after trench fill. In yet another embodiment, a block mask is formed over predetermined active areas of the etched substrate prior to the plasma nitridation process. This embodiment is used in protecting the PFET device area from the plasma nitridation process thereby providing a means to form a PFET device area in which stress caused by bird beak formation increases the device performance of the PFET.Type: GrantFiled: May 30, 2003Date of Patent: May 3, 2005Assignee: International Business Machines CorporationInventors: Sadanand V. Deshpande, Bruce B. Doris, Werner A. Rausch, James A. Slinkman