Patents by Inventor Sae Yun KO

Sae Yun KO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230107043
    Abstract: Provided is an equipment front end module (EFEM) including a base configured to communicate with a processor, a tray port on the base, the tray port being configured to load a tray including a stub and a grid holder, a working robot configured to move in a direction on the base, and grasp and convey the stub in the tray and the grid holder in the tray, and a shuttle port on the base, the shuttle port including a first groove configured to fix the stub, and a second groove configured to fix the grid holder, wherein the working robot is further configured to convey the stub to the first groove and convey the grid holder to the second groove.
    Type: Application
    Filed: April 1, 2022
    Publication date: April 6, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youn Gon OH, Sae Yun Ko, Gil Ho Gu, Dong Su Kim, Ji Hun Kim, Sang Hyuk Park, Eun Hee Lee, Ho Chan Lee, Seong Sil Jeong, Seong Pyo Hong
  • Publication number: 20230067060
    Abstract: A substrate analysis apparatus is provided. The substrate analysis includes: an interlayer conveying module configured to transport a first FOUP; an exchange module which is connected to the interlayer conveying module, and configured to transfer a wafer from the first FOUP to a second FOUP; a pre-processing module configured to form a test wafer piece using the wafer inside the second FOUP; an analysis module configured to analyze the test wafer piece; and a transfer rail configured to transport the second FOUP containing the wafer and a tray containing the test wafer piece. The wafer includes a first identifier indicating information corresponding to the wafer, the test wafer piece includes a second identifier indicating information generated by the pre-processing module which corresponds to the test wafer piece, and the analysis module is configured to analyze the first identifier and the second identifier in connection with each other.
    Type: Application
    Filed: March 9, 2022
    Publication date: March 2, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youn Gon OH, Ji Hun KIM, Sae Yun KO, Gil Ho GU, Dong Su KIM, Eun Hee LEE, Ho Chan LEE, Seong Sil JEONG, Seong Pyo HONG