Patents by Inventor Samed Halilov
Samed Halilov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8389974Abstract: A multiple-wavelength opto-electronic device may include a substrate and a plurality of active optical devices carried by the substrate and operating at different respective wavelengths. Each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.Type: GrantFiled: January 31, 2011Date of Patent: March 5, 2013Assignee: Mears Technologies, Inc.Inventors: Robert J. Mears, Robert John Stephenson, Marek Hytha, Ilija Dukovski, Jean Augustin Chan Sow Fook Yiptong, Samed Halilov, Xiangyang Huang
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Publication number: 20110193063Abstract: A multiple-wavelength opto-electronic device may include a substrate and a plurality of active optical devices carried by the substrate and operating at different respective wavelengths. Each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.Type: ApplicationFiled: January 31, 2011Publication date: August 11, 2011Applicant: MEARS TECHNOLOGIES, INC.Inventors: Robert J. Mears, Robert John Stephenson, Marek Hytha, Ilija Dukovski, Jean Augustin Chan Sow Fook Yiptong, Samed Halilov, Xiangyang Huang
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Patent number: 7880161Abstract: A multiple-wavelength opto-electronic device may include a substrate and a plurality of active optical devices carried by the substrate and operating at different respective wavelengths. Each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.Type: GrantFiled: February 16, 2007Date of Patent: February 1, 2011Assignee: Mears Technologies, Inc.Inventors: Robert J. Mears, Robert John Stephenson, Marek Hytha, Ilija Dukovski, Jean Augustin Chan Sow Fook Yiptong, Samed Halilov, Xiangyang Huang
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Patent number: 7863066Abstract: A method for making a multiple-wavelength opto-electronic device which may include providing a substrates and forming a plurality of active optical devices to be carried by the substrate and operating at different respective wavelengths. Moreover, each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.Type: GrantFiled: February 16, 2007Date of Patent: January 4, 2011Assignee: Mears Technologies, Inc.Inventors: Robert J. Mears, Robert John Stephenson, Marek Hytha, Ilija Dukovski, Jean Augustin Chan Sow Fook Yiptong, Samed Halilov, Xiangyang Huang
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Publication number: 20100270535Abstract: A method for making an electronic device may include forming a selectively polable superlattice comprising a plurality of stacked groups of layers. Each group of layers of the selectively polable superlattice may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent silicon portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The method may further include coupling at least one electrode to the selectively polable superlattice for selective poling thereof.Type: ApplicationFiled: May 18, 2010Publication date: October 28, 2010Applicant: Mears Technologies, Inc.Inventors: Samed Halilov, Xiangyang Huang, Ilija Dukovski, Jean Augustin Chan Sow Fook Yiptong, Robert J. Mears, Marek Hytha, Robert John Stephenson
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Patent number: 7718996Abstract: A semiconductor device may include a first monocrystalline layer comprising a first material having a first lattice constant. A second monocrystalline layer may include a second material having a second lattice constant different than the first lattice constant. The device may also include a lattice matching layer between the first and second monocrystalline layers and comprising a superlattice. The superlattice may include a plurality of groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween.Type: GrantFiled: February 21, 2007Date of Patent: May 18, 2010Assignee: Mears Technologies, Inc.Inventors: Ilija Dukovski, Robert John Stephenson, Jean Augustin Chan Sow Fook Yiptong, Samed Halilov, Robert J. Mears, Xiangyang Huang, Marek Hytha
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Patent number: 7700447Abstract: A method for making a semiconductor device which may include forming a first monocrystalline layer comprising a first material having a first lattice constant, a second monocrystalline layer including a second material having a second lattice constant different than the first lattice constant, and a lattice matching layer between the first and second monocrystalline layers and comprising a superlattice. More particularly, the superlattice may include a plurality of groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. Furthermore, the at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween.Type: GrantFiled: February 21, 2007Date of Patent: April 20, 2010Assignee: Mears Technologies, Inc.Inventors: Ilija Dukovski, Robert John Stephenson, Jean Augustin Chan Sow Fook Yiptong, Samed Halilov, Robert J. Mears, Xiangyang Huang, Marek Hytha
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Patent number: 7625767Abstract: A method is for making a spintronic device and may include forming at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice including a plurality of groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. The spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. In some embodiments, the repeating structure of a superlattice may not be needed.Type: GrantFiled: March 16, 2007Date of Patent: December 1, 2009Assignee: Mears Technologies, Inc.Inventors: Xiangyang Huang, Samed Halilov, Jean Augustin Chan Sow Fook Yiptong, Ilija Dukovski, Marek Hytha, Robert J. Mears
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Patent number: 7517702Abstract: A method for making an electronic device may include forming a poled superlattice comprising a plurality of stacked groups of layers and having a net electrical dipole moment. Each group of layers of the poled superlattice may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The method may further include coupling at least one electrode to the poled superlattice.Type: GrantFiled: December 21, 2006Date of Patent: April 14, 2009Assignee: MEARS Technologies, Inc.Inventors: Samed Halilov, Xiangyang Huang, Ilija Dukovski, Jean Augustin Chan Sow Fook Yiptong, Robert J. Mears, Marek Hytha, Robert John Stephenson
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Patent number: 7446002Abstract: A method for making a semiconductor device may include forming a superlattice comprising a plurality of stacked groups of layers adjacent a substrate. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a high-K dielectric layer on the electrode layer, and forming an electrode layer on the high-K dielectric layer and opposite the superlattice.Type: GrantFiled: May 25, 2005Date of Patent: November 4, 2008Assignee: MEARS Technologies, Inc.Inventors: Robert J. Mears, Marek Hytha, Scott A. Kreps, Robert John Stephenson, Jean Augustin Chan Sow Fook Yiptong, Ilija Dukovski, Kalipatnam Vivek Rao, Samed Halilov, Xiangyang Huang
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Publication number: 20080197341Abstract: A method for making a multiple-wavelength opto-electronic device which may include providing a substrates and forming a plurality of active optical devices to be carried by the substrate and operating at different respective wavelengths. Moreover, each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.Type: ApplicationFiled: February 16, 2007Publication date: August 21, 2008Applicant: RJ Mears, LLCInventors: Robert J. Mears, Robert John Stephenson, Marek Hytha, IIija Dukovski, Jean Augustin Chan Sow Fook Yiptong, Samed Halilov, Xiangyang Huang
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Publication number: 20080197340Abstract: A multiple-wavelength opto-electronic device may include a substrate and a plurality of active optical devices carried by the substrate and operating at different respective wavelengths. Each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.Type: ApplicationFiled: February 16, 2007Publication date: August 21, 2008Applicant: RJ Mears, LLCInventors: Robert J. Mears, Robert John Stephenson, Marek Hytha, Ilija Dukovski, Jean Augustin Chan Sow Fook Yiptong, Samed Halilov, Xiangyang Huang
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Publication number: 20080012004Abstract: A spintronic device may include at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice including a plurality of groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. The spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. In some embodiments, the repeating structure of a superlattice may not be needed.Type: ApplicationFiled: March 16, 2007Publication date: January 17, 2008Inventors: Xiangyang Huang, Samed Halilov, Jean Augustin Yiptong, Ilija Dukovski, Marek Hytha, Robert Mears
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Publication number: 20070238274Abstract: A method is for making a spintronic device and may include forming at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice including a plurality of groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. The spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. In some embodiments, the repeating structure of a superlattice may not be needed.Type: ApplicationFiled: March 16, 2007Publication date: October 11, 2007Applicants: RJ Mears, LLCInventors: Xiangyang HUANG, Samed HALILOV, Jean Chan Sow Fook YIPTONG, Ilija DUKOVSKI, Marek HYTHA, Robert MEARS
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Publication number: 20070197006Abstract: A method for making a semiconductor device which may include forming a first monocrystalline layer comprising a first material having a first lattice constant, a second monocrystalline layer including a second material having a second lattice constant different than the first lattice constant, and a lattice matching layer between the first and second monocrystalline layers and comprising a superlattice. More particularly, the superlattice may include a plurality of groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. Furthermore, the at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween.Type: ApplicationFiled: February 21, 2007Publication date: August 23, 2007Applicant: RJ Mears, LLCInventors: Ilija Dukovski, Robert Stephenson, Jean Augustin Chan Yiptong, Samed Halilov, Robert Mears, Xiangyang Huang, Marek Hytha
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Publication number: 20070194298Abstract: A semiconductor device may include a first monocrystalline layer comprising a first material having a first lattice constant. A second monocrystalline layer may include a second material having a second lattice constant different than the first lattice constant. The device may also include a lattice matching layer between the first and second monocrystalline layers and comprising a superlattice. The superlattice may include a plurality of groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween.Type: ApplicationFiled: February 21, 2007Publication date: August 23, 2007Applicant: RJ Mears, LLCInventors: Ilija Dukovski, Robert Stephenson, Jean Augustin Yiptong, Samed Halilov, Robert Mears, Xiangyang Huang, Marek Hytha
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Publication number: 20070187667Abstract: An electronic device may include a selectively polable superlattice comprising a plurality of stacked groups of layers. Each group of layers of the selectively polable superlattice may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent silicon portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The electronic device may also include at least one electrode for selectively poling the selectively polable superlattice.Type: ApplicationFiled: December 21, 2006Publication date: August 16, 2007Applicant: RJ Mears, LLCInventors: Samed Halilov, Xiangyang Huang, Ilija Dukovski, Jean Augustin Chan Yiptong, Robert Mears, Marek Hytha, Robert Stephenson
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Publication number: 20070166928Abstract: A method for making an electronic device may include forming a selectively polable superlattice comprising a plurality of stacked groups of layers. Each group of layers of the selectively polable superlattice may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent silicon portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The method may further include coupling at least one electrode to the selectively polable superlattice for selective poling thereof.Type: ApplicationFiled: December 21, 2006Publication date: July 19, 2007Applicant: RJ Mears, LLCInventors: Samed Halilov, Xiangyang Huang, Ilija Dukovski, Jean Augustin Yiptong, Robert Mears, Marek Hytha, Robert Stephenson
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Publication number: 20070161138Abstract: A method for making an electronic device may include forming a poled superlattice comprising a plurality of stacked groups of layers and having a net electrical dipole moment. Each group of layers of the poled superlattice may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The method may further include coupling at least one electrode to the poled superlattice.Type: ApplicationFiled: December 21, 2006Publication date: July 12, 2007Applicant: RJ Mears, LLCInventors: Samed Halilov, Xiangyang Huang, Ilija Dukovski, Jean Augustin Yiptong, Robert Mears, Marek Hytha, Robert Stephenson
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Publication number: 20070158640Abstract: An electronic device may include a poled superlattice comprising a plurality of stacked groups of layers and having a net electrical dipole moment. Each group of layers of the poled superlattice may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The electronic device may further include at least one electrode coupled to the poled superlattice.Type: ApplicationFiled: December 21, 2006Publication date: July 12, 2007Applicant: RJ Mears, LLCInventors: Samed Halilov, Xiangyang Huang, Ilija Dukovski, Jean Augustin Yiptong, Robert Mears, Marek Hytha, Robert Stephenson