Abstract: A power module includes a semiconductor substrate and spaced power transistor circuits formed in the substrate, each having respective anode and cathode portions. A power module housing substantially encloses the substrate. Flexible cathode straps and flexible anode straps are connected to the respective anode and cathode portions and extend out of the power module housing spaced from each other. At least two anode straps and cathode straps fold over at least a portion of the power module housing to overlap each other and form phase straps. The remaining cathode and anode straps fold over at least a portion of the power module housing such that respective cathode and anode straps overlap each other, thereby lowering inductance and reducing voltage overshoots at turn off.

Abstract: A power module includes a semiconductor substrate and spaced power transistor circuits formed in the substrate, each having respective anode and cathode portions. A power module housing substantially encloses the substrate. Flexible cathode straps and flexible anode straps are connected to the respective anode and cathode portions and extend out of the power module housing spaced from each other. At least two anode straps and cathode straps fold over at least a portion of the power module housing to overlap each other and form phase straps. The remaining cathode and anode straps fold over at least a portion of the power module housing such that respective cathode and anode straps overlap each other, thereby lowering inductance and reducing voltage overshoots at turn off.

Abstract: A two-sided hermetically sealed package of a metal matrix composite material includes a heat sink and integral cooling fins on each of the two sides which are totally enclosed to retain cooling fluid. Power semiconductors are mounted on ceramic substrates having metallic conductors mounted on both sides thereof. The substrates are mounted to the heat sinks. Cooling is provided by the passage of cooling fluid into one end of the enclosed fins, over the fins and out the other end. The metal matrix composite material and the ceramic are thermally matched and the package is provided with a minimum number of thermal interfaces.

Abstract: A snubber circuit for a neutral clamped power inverter. The power inverter includes power transistors, a current sensor at the inverter output and a neutral clamping circuit connected between the inverter output and a neutral point in a DC power source which supplies the inverter. A controller circuit is connected to the current sensor, to the power transistors and to the neutral clamping circuit to selectively enable and disable the power transistors and the neutral clamping circuit in accordance with the inverter operation and current direction at the inverter output to minimize current transients at a load. An active snubber arrangement is provided to minimize snubber losses when the power transistors are inactive during alternate positive and negative half-cycles of operation.

Abstract: An inverter in accordance with the present invention includes a plurality of bipolar transistors (102) with each bipolar transistor having a freewheeling diode (108) poled in parallel with outputs of the bipolar transistor, a current transformer (112) in a positive feedback circuit (110) associated with each bipolar transistor causing a positive feedback to be applied from an output of the inverter to a base of each bipolar transistor to provide a base drive proportional to current flowing in a load coupled to the bipolar transistors, a rectifier (120), disposed in each of the positive feedback circuits for permitting current to flow to the base of the bipolar transistor when the bipolar transistor is conductive and blocking flow of current from the base to the emitter when the bipolar transistor is not forward biased.

Abstract: The problem of sensing current through inverter switches is solved by a current transformer which has windings connected with the flyback diodes to demagnetize or reset the current transformer core. Size and weight of the transformer are minimized while avoiding a buildup of flux which would saturate the core.

Abstract: A power inverter having a neutral clamping circuit which is controlled for low harmonic output. The power inverter includes power transistors, a current sensor at the inverter output and a neutral clamping circuit connected between the inverter output and a neutral point in a DC power source which supplies the inverter. A controller circuit is connected to the current sensor, to the power transistors and to the neutral clamping circuit to selectively enable and disable the power transistors in the neutral clamping circuit in accordance with the inverter operation and current direction at the inverter output to minimize current transients at the load.

Abstract: Prior base drive circuits for Darlington-connected transistors have accomplished a significant increase in the rate at which such transistors can be turned off and on. However, such circuits have utilized relatively numerous circuit elements or components to accomplish this result. In order to overcome this problem, a drive circuit 26 for rapidly switching driver and driven transistors Q3, Q4 connected in a Darlington configuration includes a first controllable switch Q1 coupled to a control electrode of the driver transistor Q3, an inductor L1 coupled to the first controllable switch Q1 and the control electrode of the driver transistor Q3 and a second controllable switch Q2 coupled to the control electrode of at least one of the transistors. A driving stage 32 is coupled to the controllable switches and closes same at the beginning of a turn on sequence to establish current flow through the inductor.

Abstract: A load is controlled by a pulse waveform from a source. The source and load are electrically isolated by using two monostable circuits to detect the leading and trailing edge of the pulse waveform, two pulse transformers to isolate the source and the load, and a bistable circuit to reconstruct the original pulse waveform.

Abstract: A Darlington connected switching circuit (20) having a bipolar driver transistor (22) and at least one driven transistor (24) having a rapid and reliable turn-off characteristic with low losses suitable for use in power applications such as inverters. The collector to emitter potential of the at least one driven transistor is sensed by a comparator (26) to produce an output signal for controlling the conduction of minority carriers from the base of the driven transistor in response to sensing that the emitter to collector potential has become greater in magnitude than a reference potential (Vref) applied to the comparator. The reference potential is chosen to be at least a function of the switching characteristic of the driven transistor.

Abstract: A Darlington-type amplifier (10) having an input field effect transistor and an output bipolar transistor (T.sub.2) is disclosed with improved turn-off time. Turnoff is enhanced by short-circuiting the gate-to-source or drain capacitance of the input field effect transistor (T.sub.1) and after turnoff is complete of the input field effect transistor prior to turn off of the output bipolar transistor (T.sub.2) coupling the base of the output bipolar transistor to a reference potential to discharge minority carriers therein to complete turnoff.

Abstract: A three phase inverter (40) is disclosed for use with loads (100) which are unbalanced. A transformer (80) having primary windings (82), (84) and (86) which are respectively connected to phase outputs (52, 54 and 56) has a secondary having individual windings (88, 90 and 92) connected in a delta configuration which minimizes the flow of unbalanced current in the unbalanced load. A second embodiment utilizes a transformer in an interconnected configuration. A neutral connecting the conductive switches to the load is unnecessary with the invention.

Abstract: A DC to DC power converter having first and second input terminals and an output terminal for providing an output voltage at the output terminal which is at a potential halfway between a DC potential applied by a DC power supply across the first and second input terminal is disclosed. The converter comprises first and second switches connected at a switch junction in series across the first and second input terminals, first and second series-coupled diodes coupled at a diode junction across the first and second input terminals in reverse-bias relationship with respect to the DC potential applied across the first and second input terminals, a transformer comprising two windings inductively linked and having first and second ends and a center-tap, the ends coupled between the switch junction and the diode junction and the center-tap coupled to the output terminal and means for alternately switching the first and the second switches at an equal duty factor.

Abstract: Prior circuits for rapidly switching Darlington-connected transistors between on and off states have accomplished relatively fast switching by applying reverse base drive to the transistors to quickly sweep the excess carriers therefrom. However, such circuits have not accomplished the required degree of reduction of turn off time and have induced localized "hot spots" in the base-collector junctions of the transistors.

Abstract: Bi-directional switches for use with neutral point clamped PWM inverters have utilized clamping switches which are operated alternately with main power switches in the inverter to periodically connect an output terminal of the inverter to a neutral voltage. However, a delay period is typically interposed between turn-off of a main power switch and turn-on of the clamping switch to minimize the possibility of a potentially destructive shoot-through condition. This delay adversely affects the quality of the power developed by the inverter and leads to an undesired increase in the size of snubber circuits coupled across the power switches. In order to overcome these problems, a bi-directional switch according to the present invention includes circuitry for providing a high impedance path in series circuits including the main power switches and the clamping switch so that shoot-through currents are blocked even when one of the main power switches and the clamping switch are simultaneously on.

Abstract: Prior types of neutral point clamped PWM inverters have included memories for storing a plurality of PWM waveforms, one of which is utilized to control switches in the inverter to maintain an output parameter within prescribed limits. Such types of inverter controls, however, cannot provide the necessary degree of regulation in some applications. To overcome this problem, an inverter control according to the present invention permits on-line generation of PWM patterns for a neutral point clamped PWM inverter. The control includes circuitry for generating a depth of modulation signal representing the deviation of the output of the inverter from a desired level. A microprocessor and memory are coupled to the generating circuitry for calculating switching points for the inverter switches during operation of the inverter based upon the depth of modulation signal for a given number of pulses to be produced during each half cycle of the output.