Patents by Inventor Samuel R. Levine

Samuel R. Levine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5365204
    Abstract: A variable frequency digital ring oscillator which can be formed in a small area for use in testing of chips employs a ring oscillator formed of CMOS inverters, transmission gates and capacitors and CMOS logic as a voltage controlled ring oscillator. A wide range of frequency of oscillation is achieved with small number of components. The ring oscillator circuit's oscillator frequency is controlled only by DC voltages, such as may be provided by (but not limited to) a manufacturing chip tester. The output signal of the oscillator swings between Vdd and Vss and does not need additional level translation circuits to drive CMOS logic. The ring oscillator can be composed of an odd number of CMOS inverters connected in cascade to form a loop. We provide a CMOS transmission gate with PMOS and NMOS transistor device inserted between each adjacent inverter and a MOS capacitor connected between the output of each transmission gate and the Vss supply of the ring oscillator circuit (conventionally ground).
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: November 15, 1994
    Assignee: International Business Machines Corporation
    Inventors: John M. Angiulli, Arun K. Ghose, Richard R. Konian, Samuel R. Levine, David Meltzer, Wen-Yuan Wang, Leon L. Wu
  • Patent number: 5323293
    Abstract: A low temperature conduction module comprising a cold plate having recesses around the periphery thereof to accommodate memory cubes is disclosed. The recesses accommodating the memory cubes are of such depth and dimension as to enclose the memory cube on all but one side, thereby greatly enhancing the conduction of the heat generated by the memory cube to the cold plate. The memory cube may be surrounded by a material which possesses excellent thermal conductive properties to insure efficient transfer of the heat from the memory cube to the cold plate. The plurality of memory cubes so positioned within the cold plate may be connected by a flexible cable surrounding the cold plate and having branch conductors extending to connect with computer processors enclosed within the same low temperature conduction module.
    Type: Grant
    Filed: December 18, 1992
    Date of Patent: June 21, 1994
    Assignee: International Business Machines Corporation
    Inventors: John M. Angiulli, Arun K. Ghose, Richard R. Konian, Samuel R. Levine, Kevin P. Moran, Vincent C. Vasile
  • Patent number: 4380813
    Abstract: This error checker determines if more than one set of control signals F1 through FN are on and also flags invalid as opposed to valid situations where none of the control signals F1 to FN are on. To distinguish the invalid from valid situations where none of the control signals F1 to FN are on, an additional control signal X=F1.multidot.F2.multidot. . . . .multidot.FN is generated and then fed with the control signals F1 to FN through a prior art detector which detects when more than one or none of the control signals X and F1 through FN are on.
    Type: Grant
    Filed: April 1, 1981
    Date of Patent: April 19, 1983
    Assignee: International Business Machines Corp.
    Inventors: Leonard L. Fogell, Samuel R. Levine, Arnold Weinberger
  • Patent number: 4228520
    Abstract: A high speed multiply apparatus minimizes latch requirements and I/O pin requirement between chips by a new configuration which iteratively adds four multiples of a multiplicand in a stage of 4-2 carry save adders which then feed four-bit parallel adders each having four sum outputs and a carry output from the highest order bit position. Only the sum outputs are latched and then fed to a carry propagate adder on each iteration for addition to the previous partial products. Only the single carry output from each of the 4-bit parallel adders needs to be latched and then fed to another 4-bit parallel adder.
    Type: Grant
    Filed: May 4, 1979
    Date of Patent: October 14, 1980
    Assignee: International Business Machines Corporation
    Inventors: Robert C. Letteney, Samuel R. Levine, David T. Shen, Arnold Weinberger
  • Patent number: 4118786
    Abstract: An improved system for adding two numbers together. The numbers may be expressed either in binary form or in binary coded decimal form (wherein each decimal digit is represented by its equivalent four binary bits). By taking advantage of "don't care" decimal input conditions, a minimal implementation of a carry look-ahead adder which can operate upon both types of numbers is obtained.
    Type: Grant
    Filed: January 10, 1977
    Date of Patent: October 3, 1978
    Assignee: International Business Machines Corporation
    Inventors: Samuel R. Levine, Shanker Singh, Arnold Weinberger