Patents by Inventor Samuli Laine
Samuli Laine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240013471Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.Type: ApplicationFiled: September 21, 2023Publication date: January 11, 2024Inventors: Samuli LAINE, Timo AILA, Tero KARRAS, Gregory MUTHLER, William P. NEWHALL, JR., Ronald C. BABICH, JR., Craig KOLB, Ignacio LLAMAS, John BURGESS
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Publication number: 20230410410Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.Type: ApplicationFiled: August 30, 2023Publication date: December 21, 2023Inventors: Samuli LAINE, Tero KARRAS, Greg MUTHLER, William Parsons Newhall, JR., Ronald Charles BABACH, JR., Ignacio LLAMAS, John BURGESS
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Patent number: 11823320Abstract: In examples, a list of elements may be divided into spans and each span may be allocated a respective memory range for output based on a worst-case compression ratio of a compression algorithm that will be used to compress the span. Worker threads may output compressed versions of the spans to the memory ranges. To ensure placement constraints of a data structure will be satisfied, boundaries of the spans may be adjusted prior to compression. The size allocated to a span (e.g., each span) may be increased (or decreasing) to avoid padding blocks while allowing for the span's compressed data to use a block allocated to an adjacent span. Further aspects of the disclosure provide for compaction of the portions of compressed data in memory in order to free up space which may have been allocated to account for the memory gaps which may result from variable compression ratios.Type: GrantFiled: March 7, 2022Date of Patent: November 21, 2023Assignee: NVIDIA CorporationInventors: Timo Tapani Viitanen, Tero Tapani Karras, Samuli Laine
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Publication number: 20230368073Abstract: Techniques are disclosed herein for generating a content item. The techniques include receiving a content item and metadata indicating a level of corruption associated with the content item; and for each iteration included in a plurality of iterations: performing one or more operations to add corruption to a first version of the content item to generate a second version of the content item, and performing one or more operations to reduce corruption in the second version of the content item to generate a third version of the content item, wherein a level of corruption associated with the third version of the content item is less than a level of corruption associated with the first version of the content item.Type: ApplicationFiled: March 10, 2023Publication date: November 16, 2023Inventors: Tero Tapani KARRAS, Miika AITTALA, Timo Oskari AILA, Samuli LAINE
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Publication number: 20230368337Abstract: Techniques are disclosed herein for generating a content item. The techniques include receiving a content item and metadata indicating a level of corruption associated with the content item; and for each iteration included in a plurality of iterations: performing one or more operations to add corruption to a first version of the content item to generate a second version of the content item, and performing one or more operations to reduce corruption in the second version of the content item to generate a third version of the content item, wherein a level of corruption associated with the third version of the content item is less than a level of corruption associated with the first version of the content item.Type: ApplicationFiled: March 10, 2023Publication date: November 16, 2023Inventors: Tero Tapani KARRAS, Miika AITTALA, Timo Oskari AILA, Samuli LAINE
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Patent number: 11804000Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.Type: GrantFiled: October 28, 2021Date of Patent: October 31, 2023Assignee: NVIDIA CORPORATIONInventors: Samuli Laine, Timo Aila, Tero Karras, Gregory Muthler, William P. Newhall, Jr., Ronald C. Babich, Jr., Craig Kolb, Ignacio Llamas, John Burgess
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Patent number: 11790595Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.Type: GrantFiled: September 30, 2021Date of Patent: October 17, 2023Assignee: NVIDIA CorporationInventors: Samuli Laine, Tero Karras, Greg Muthler, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., Ignacio Llamas, John Burgess
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Publication number: 20230298258Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.Type: ApplicationFiled: May 18, 2023Publication date: September 21, 2023Inventors: Samuli LAINE, Tero Karras, Timo Aila, Robert Ohannessian, William Parsons Newhall, JR., Greg Muthler, Ian Kwong, Peter Nelson, John Burgess
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Publication number: 20230237729Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.Type: ApplicationFiled: March 31, 2023Publication date: July 27, 2023Inventors: Greg MUTHLER, Tero KARRAS, Samuli LAINE, William Parsons NEWHALL, JR., Ronald Charles BABICH, JR., John BURGESS, Ignacio LLAMAS
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Patent number: 11704863Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.Type: GrantFiled: April 8, 2022Date of Patent: July 18, 2023Assignee: NVIDIA CorporationInventors: Samuli Laine, Tero Karras, Timo Aila, Robert Ohannessian, William Parsons Newhall, Jr., Greg Muthler, Ian Kwong, Peter Nelson, John Burgess
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Patent number: 11675704Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.Type: GrantFiled: September 23, 2021Date of Patent: June 13, 2023Assignee: NVIDIA CorporationInventors: Greg Muthler, Timo Aila, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas
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Method for continued bounding volume hierarchy traversal on intersection without shader intervention
Patent number: 11645810Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.Type: GrantFiled: November 5, 2021Date of Patent: May 9, 2023Assignee: NVIDIA CorporationInventors: Greg Muthler, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas -
Publication number: 20220284621Abstract: One embodiment of a method includes calculating one or more activation values of one or more neural networks trained to infer eye gaze information based, at least in part, on eye position of one or more images of one or more faces indicated by an infrared light reflection from the one or more images.Type: ApplicationFiled: May 2, 2022Publication date: September 8, 2022Inventors: Joohwan Kim, Michael Stengel, Zander Majercik, Shalini De Mello, Samuli Laine, Morgan McGuire, David Luebke
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Publication number: 20220230380Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.Type: ApplicationFiled: April 8, 2022Publication date: July 21, 2022Inventors: Samuli Laine, Tero Karras, Timo Aila, Robert Ohannessian, William Parsons Newhall, JR., Greg Muthler, Ian Kwong, Peter Nelson, John Burgess
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Publication number: 20220198741Abstract: In examples, a list of elements may be divided into spans and each span may be allocated a respective memory range for output based on a worst-case compression ratio of a compression algorithm that will be used to compress the span. Worker threads may output compressed versions of the spans to the memory ranges. To ensure placement constraints of a data structure will be satisfied, boundaries of the spans may be adjusted prior to compression. The size allocated to a span (e.g., each span) may be increased (or decreasing) to avoid padding blocks while allowing for the span's compressed data to use a block allocated to an adjacent span. Further aspects of the disclosure provide for compaction of the portions of compressed data in memory in order to free up space which may have been allocated to account for the memory gaps which may result from variable compression ratios.Type: ApplicationFiled: March 7, 2022Publication date: June 23, 2022Inventors: Timo Tapani Viitanen, Tero Tapani Karras, Samuli Laine
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Patent number: 11328472Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.Type: GrantFiled: September 25, 2020Date of Patent: May 10, 2022Assignee: NVIDIA CorporationInventors: Samuli Laine, Tero Karras, Timo Aila, Robert Ohannessian, William Parsons Newhall, Jr., Greg Muthler, Ian Kwong, Peter Nelson, John Burgess
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Patent number: 11321865Abstract: One embodiment of a method includes calculating one or more activation values of one or more neural networks trained to infer eye gaze information based, at least in part, on eye position of one or more images of one or more faces indicated by an infrared light reflection from the one or more images.Type: GrantFiled: March 15, 2019Date of Patent: May 3, 2022Assignee: Nvidia CorporationInventors: Joohwan Kim, Michael Stengel, Zander Majercik, Shalini De Mello, Samuli Laine, Morgan McGuire, David Luebke
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Patent number: 11270495Abstract: In examples, a list of elements may be divided into spans and each span may be allocated a respective memory range for output based on a worst-case compression ratio of a compression algorithm that will be used to compress the span. Worker threads may output compressed versions of the spans to the memory ranges. To ensure placement constraints of a data structure will be satisfied, boundaries of the spans may be adjusted prior to compression. The size allocated to a span (e.g., each span) may be increased (or decreasing) to avoid padding blocks while allowing for the span's compressed data to use a block allocated to an adjacent span. Further aspects of the disclosure provide for compaction of the portions of compressed data in memory in order to free up space which may have been allocated to account for the memory gaps which may result from variable compression ratios.Type: GrantFiled: May 21, 2020Date of Patent: March 8, 2022Assignee: NVIDIA CorporationInventors: Timo Tapani Viitanen, Tero Tapani Karras, Samuli Laine
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METHOD FOR CONTINUED BOUNDING VOLUME HIERARCHY TRAVERSAL ON INTERSECTION WITHOUT SHADER INTERVENTION
Publication number: 20220058856Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.Type: ApplicationFiled: November 5, 2021Publication date: February 24, 2022Inventors: Greg Muthler, Tero Karras, Samuli Laine, William Parsons Newhall, JR., Ronald Charles Babich, JR., John Burgess, Ignacio Llamas -
Publication number: 20220051468Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.Type: ApplicationFiled: October 28, 2021Publication date: February 17, 2022Inventors: Samuli LAINE, Timo AILA, Tero KARRAS, Gregory MUTHLER, William P. NEWHALL, JR., Ronald C. BABICH, JR., Craig KOLB, Ignacio LLAMAS, John BURGESS