Abstract: In one embodiment, a processor includes a non-volatile storage to store a plurality of configurations for the processor, the non-volatile storage including a plurality of entries to store configuration information for the processor for one of the plurality of configurations, the configuration information including at least one of a guaranteed operating frequency and a core count, at least one of the entries to store the core count. The processor further includes a power controller to control the processor to operate at one of the plurality of configurations based at least in part on a selected thermal set point of a plurality of thermal set points of the processor, each of the plurality of thermal set points associated with one of the configurations. Other embodiments are described and claimed.

Abstract: A method of optimizing computer-implemented building design, includes the following: defining one or more options for each building component; providing an energy use intensity versus cost optimization value for each option for a plurality of metrics; selecting a subset of the plurality of metrics applicable to each option; defining a metric vector for each metric through connecting the energy use intensity versus cost optimization value for each option; arranging each metric vector on a coordinate grid with an equal angle between each metric vector; constructing a two-dimensional polygon on an XY-plane by interconnecting for all the metric vectors the energy use intensity versus cost optimization value for each option; providing a performance value for each option for each metric vector based on a percentage the metric vector the associated option represents; and representing a fitness factor for each option as a function of each of the plurality of metrics.

Abstract: Techniques for processor loading mechanisms are disclosed. In the illustrative embodiment, a heat sink is in contact with a top surface of a processor, applying a downward force on the processor. A load plate is also in contact with the processor, applying a downward force to the processor as well. The combination of the downward force from the load plate and the heat sink keep the processor in good physical contact with pins of the processor socket. The heat sink has enough force applied to the processor to be in good thermal contact with the processor without applying higher stress to the heat sink. The load plate can apply force to the processor without regard to the thermal characteristics of the load plate. Other embodiments are envisioned and described.

Abstract: Two liquid cooling mechanisms are provided for cooling integrated circuit components immersed in an open bath immersion tank. In the first mechanism, heat generated by high-thermal design power (TDP) components is absorbed by a working fluid passing through cold plates coupled to the high-TDP components. The cold plates are part of direct liquid cooling loops attached to supply and return manifolds fluidly connected to a cooling distribution unit. In the second mechanism, integrated circuit components not coupled to any of the direct liquid cooling loops dissipate heat directly to the immersion fluid. In some embodiments, the tank is a closed bath immersion tank and heat captured by the working fluid is reclaimed and converted to electricity. Working fluid flow rate can be adjusted based on integrated circuit component power consumption levels to achieve a desired working fluid temperature as it enters an energy reclamation unit.

Abstract: An apparatus is described. The apparatus includes an electronic system. The electronic system includes a chassis. The electronic system includes a semiconductor chip cooling component that is rigidly fixed to the chassis. The electronic system includes a packaged semiconductor chip having a lid that is contact with the semiconductor chip cooling component. The electronic system includes an electronic circuit board. The packaged semiconductor chip is electro-mechanically attached to the electronic circuit board.

Abstract: In one embodiment, a processor comprises: a first die including at least one core and at least one first die thermal sensor; a second die including at least one memory and at least one second die thermal sensor; and a thermal controller to receive first thermal data from the at least one first die thermal sensor and second thermal data from the at least one second die thermal sensor, calculate a first thermal margin for the first die based at least in part on the first thermal data and a first thermal loadline for the first die and calculate a second thermal margin for the second die based at least in part on the second thermal data and a second thermal loadline for the second die. Other embodiments are described and claimed.

Abstract: In an embodiment, a processor includes at least one core and power management logic. The power management logic is to receive temperature data from a plurality of dies within a package that includes the processor, and determine a smallest temperature control margin of a plurality of temperature control margins. Each temperature control margin is to be determined based on a respective thermal control temperature associated with the die and also based on respective temperature data associated with the die. The power management logic is also to generate a thermal report that is to include the smallest temperature control margin, and to store the thermal report. Other embodiments are described and claimed.

Abstract: In an embodiment, a processor includes at least one core and power management logic. The power management logic is to receive temperature data from a plurality of dies within a package that includes the processor, and determine a smallest temperature control margin of a plurality of temperature control margins. Each temperature control margin is to be determined based on a respective thermal control temperature associated with the die and also based on respective temperature data associated with the die. The power management logic is also to generate a thermal report that is to include the smallest temperature control margin, and to store the thermal report. Other embodiments are described and claimed.

Abstract: An apparatus incorporating a multi-surface heat sink may comprise an integrated circuit die, a heat spreader, a plate element, and a heat sink. The heat spreader may be positioned above the IC die. The plate element may be positioned above the heat spreader. A bottom surface of the heat sink may have a first region positioned above the plate element. One or more spring elements may be positioned between the plate element and the first region of the bottom surface of the heat sink. The one or more spring elements may be under a compressive load between the plate element and the heat sink. One or more thermal conduit elements may be secured to both the plate element and the heat sink. The one or more thermal conduit elements may apply at least a part of the compressive load between the plate element and the heat sink.

Abstract: A method of optimizing computer-implemented building design, includes the following: defining one or more options for each building component; providing an energy use intensity versus cost optimization value for each option for a plurality of metrics; selecting a subset of the plurality of metrics applicable to each option; defining a metric vector for each metric through connecting the energy use intensity versus cost optimization value for each option; arranging each metric vector on a coordinate grid with an equal angle between each metric vector; constructing a two-dimensional polygon on an XY-plane by interconnecting for all the metric vectors the energy use intensity versus cost optimization value for each option; providing a performance value for each option for each metric vector based on a percentage the metric vector the associated option represents; and representing a fitness factor for each option as a function of each of the plurality of metrics.

Abstract: A microelectronic device may include a substrate, a first component, a second component, a slug, a heat spreader, and a heatsink. The substrate may include a plurality of electrically conductive elements. The first component may be coupled to the substrate. The second component may be coupled to the substrate. The slug may be thermally coupled to the second component. The heat spreader may be in contact with the substrate, where the heat spreader may be thermally coupled to the first component. The heatsink may be thermally coupled to the heat spreader and the slug.

Abstract: A method for determining whether to perform maintenance for an electronic device includes generating a baseline characterization of thermal performance for a heat-generating component of the electronic device at a baseline date. The method also includes generating an assessment characterization of the thermal performance at an assessment date after the baseline date. The method further includes generating a historical trend that includes the baseline characterization and the assessment characterization. Additionally, the method includes determining whether to perform maintenance for the heat-generating component based on the historical trend and a specified maintenance parameter.

Abstract: In one embodiment, a processor comprises: a first die including at least one core and at least one first die thermal sensor; a second die including at least one memory and at least one second die thermal sensor; and a thermal controller to receive first thermal data from the at least one first die thermal sensor and second thermal data from the at least one second die thermal sensor, calculate a first thermal margin for the first die based at least in part on the first thermal data and a first thermal loadline for the first die and calculate a second thermal margin for the second die based at least in part on the second thermal data and a second thermal loadline for the second die. Other embodiments are described and claimed.

Abstract: Disclosed herein is a computing device configured to implement thermal throttling of a component of the computing device. The computing device includes an electronic component and a temperature sensor thermally coupled to the electronic component. The computing device also includes a thermal management controller to receive a temperature measurement from the temperature sensor and generate a throttling factor for the electronic component. If the temperature measurement is greater than a specified threshold, the throttling factor is to reduce performance of the electronic component to be at least the performance guarantee for the electronic component.

Abstract: In one embodiment, a processor comprises: a first die including at least one core and at least one first die thermal sensor; a second die including at least one memory and at least one second die thermal sensor; and a thermal controller to receive first thermal data from the at least one first die thermal sensor and second thermal data from the at least one second die thermal sensor, calculate a first thermal margin for the first die based at least in part on the first thermal data and a first thermal loadline for the first die and calculate a second thermal margin for the second die based at least in part on the second thermal data and a second thermal loadline for the second die. Other embodiments are described and claimed.

Abstract: In one embodiment, a processor includes a non-volatile storage to store a plurality of configurations for the processor, the non-volatile storage including a plurality of entries to store configuration information for the processor for one of the plurality of configurations, the configuration information including at least one of a guaranteed operating frequency and a core count, at least one of the entries to store the core count. The processor further includes a power controller to control the processor to operate at one of the plurality of configurations based at least in part on a selected thermal set point of a plurality of thermal set points of the processor, each of the plurality of thermal set points associated with one of the configurations. Other embodiments are described and claimed.

Abstract: Embodiments described herein may include apparatuses, systems and/or processes to provide an evaporator including a chamber to receive condensate flow from an input end and output a vapor outflow at an output end with a wick, heated by a surface of the chamber, having variable thickness within the chamber to receive condensate, where the thickness of the wick proximate to the condensate inflow is greater than the thickness of the wick proximate to the vapor outflow. Other embodiments may be described and/or claimed.

Abstract: Apparatus and method to increase structural integrity of heatsinks are described herein. In embodiments, an apparatus may include a plurality of thermal dissipation fins; and a base disposed below the plurality of thermal dissipation fins, wherein the base is to include an evacuated space in which one or more thermal transport pipes and one or more stiffener structures are disposed, the evacuated space is to include a first side proximate to the plurality of thermal dissipation fins and a second side opposite the first side, and wherein a stiffener structure of the one or more stiffener structures attaches to the first or second side.

Abstract: Methods and systems may provide for identifying a thermal management setting in a computing system, and comparing the thermal management setting to valid configuration information. In addition, the thermal management setting may be modified if it does not comply with the valid configuration information, wherein the modification can cause the thermal management setting to comply with the valid configuration information. Additionally, a threat risk notification can be initiated in order to notify users of the non-compliance.

Abstract: In one embodiment, a processor comprises: a first die including at least one core and at least one first die thermal sensor; a second die including at least one memory and at least one second die thermal sensor; and a thermal controller to receive first thermal data from the at least one first die thermal sensor and second thermal data from the at least one second die thermal sensor, calculate a first thermal margin for the first die based at least in part on the first thermal data and a first thermal loadline for the first die and calculate a second thermal margin for the second die based at least in part on the second thermal data and a second thermal loadline for the second die. Other embodiments are described and claimed.