Abstract: Disclosed herein is a method of manufacturing a semiconductor device that includes: performing a first exposure process with a first exposure mask having a first space pattern formed in a first direction; performing a second exposure process with a second exposure mask different from the first exposure mask, the second exposure mask having a second space pattern formed in a second direction intersected with the first direction; and forming a contact hole by a developing process.

Abstract: A semiconductor device and a method for fabricating the same are provided. The method includes: forming a plurality of protruded patterns smaller than gate structures by selectively removing predetermined portions of a substrate; and forming the gate structures over the protruded patterns. The semiconductor device includes: a plurality of protruded substrate portions smaller than the gate structures; and a plurality of gate structures encompassing the protruded substrate portions. Each of the gate structures includes a gate conductive layer that extends below the top and along profiles of the corresponding protruded portion such that channels are formed on surfaces of the protruded portions.

Abstract: A semiconductor device and a method for fabricating the same are provided. The method includes: forming a plurality of protruded patterns smaller than gate structures by selectively removing predetermined portions of a substrate; and forming the gate structures over the protruded patterns. The semiconductor device includes: a plurality of protruded substrate portions smaller than the gate structures; and a plurality of gate structures encompassing the protruded substrate portions, wherein channels are formed on surfaces of the protruded substrate portion.

Abstract: A substrate has an active region divided into storage node contact junction regions, channel regions and a bit line contact junction region. Device isolation layers are formed in the substrate isolating the active region from a neighboring active region Recess patterns are formed each in a trench structure and extending from a storage node contact junction region to a channel region Line type gate patterns, each filling a predetermined portion of the trench of the individual recess pattern, is formed in a direction crossing a major axis of the active region in an upper portion of the individual channel region.

Abstract: A method for manufacturing a capacitor of a semiconductor device includes: forming an interlayer insulating film including a contact plug over a semiconductor substrate; forming a first stack film including a capacitor oxide film and a nitride film over the interlayer insulating film; etching the first stack film to form a first stack pattern and a contact hole that exposes the contact plug; forming a lower electrode in the contact hole; forming a capping oxide film continuously over the first stack pattern to form a bridge connecting the neighboring first stack patterns; forming an etching barrier film including cavities over the capping oxide film; performing a blanket etching process onto the etching barrier film including cavities until the capacitor oxide film is exposed to form a nitride film pattern; and removing the exposed capacitor oxide film.

Abstract: A photo mask and a semiconductor device fabricated using the same is disclosed. The photo mask to form a mask pattern defining a STAR gate region includes a transparent substrate, and a light-shielding pattern defining a zigzag W-STAR gate region, wherein a waved portion of the light-shielding pattern partially overlaps a gate region and a storage node contact region of an active region disposed on a semiconductor substrate. The semiconductor device includes an active region and a device isolation region defining the active region disposed in a semiconductor substrate, a gate electrode, wherein a line width of the gate electrode in the active region is greater than that in the device isolation region, and a zigzag W-STAR gate region, wherein the waved portion of the zigzag W-STAR gate region partially overlaps the gate region and the storage node contact region in the active region.

Abstract: To overcome the limitations to development of photosensitive layers in a lithography process using a light source such as KrF, ArF, VUV, EUV, E-beam, ion beam, etc., and a patterning process of a large circuit board or a bending substrate, the invention provides a method for manufacturing a semiconductor device in which the photosensitive layer comprises a thermal acid generator that is reacted with heat to form an acid, and a masking process in a lithography process using a light source is performed as a heat conduction process using a thermally conductive pattern so that a patterning process is performed easily without limiting the size and shape of a semiconductor substrate.

Abstract: A method for exposing photoresist film of semiconductor device is disclosed. In accordance with the method, wafer is sequentially shifted the wafer by a predetermined distance so that the exposed regions before and after each shift have an overlapping region having an area larger than or equal to that of the die pattern to prevent defects on the exposure mask from being transcribed to the photoresist film.

Abstract: Disclosed herein is a method of manufacturing a semiconductor device that includes: performing a first exposure process with a first exposure mask having a first space pattern formed in a first direction; performing a second exposure process with a second exposure mask different from the first exposure mask, the second exposure mask having a second space pattern formed in a second direction intersected with the first direction; and forming a contact hole by a developing process.

Abstract: A photo mask comprises a H-type light-shield pattern. In an exposure process, a photo mask is used to form a STAR (Step Asymmetry Recess) gate region, thereby stably securing a storage node contact region and improving a refresh characteristic of a semiconductor device.

Abstract: A method for manufacturing a capacitor of a semiconductor device may include: forming an interlayer insulating film including a contact plug over a semiconductor substrate; forming a first stack film comprising a capacitor oxide film and a nitride film over the interlayer insulating film; etching the first stack film to form a first stack pattern and a contact hole that exposes the contact plug; forming a lower electrode in the contact hole; forming a capping oxide film continuously over the first stack pattern so as to form a bridge between neighboring the first stack patterns; forming an etching barrier film including cavities over the capping oxide film; performing a blanket etching process onto the etching barrier film including cavities until the capacitor oxide film is exposed to form a nitride film pattern; and removing the exposed capacitor oxide film.

Abstract: To overcome the limitations to development of photosensitive layers in a lithography process using a light source such as KrF, ArF, VUV, EUV, E-beam, ion beam, etc., and a patterning process of a large circuit board or a bending substrate, the invention provides a method for manufacturing a semiconductor device in which the photosensitive layer comprises a thermal acid generator that is reacted with heat to form an acid, and a masking process in a lithography process using a light source is performed as a heat conduction process using a thermally conductive pattern so that a patterning process is performed easily without limiting the size and shape of a semiconductor substrate.

Abstract: A method for forming fine patterns of a semiconductor device is provided, the method including forming a first lower layer pattern having a width of two minimum line width and a space pattern on a semiconductor substrate prior to a C-HALO implant process and etching the first lower layer pattern to separate into a second lower layer pattern having a width of two minimum line widths and a space pattern.

Abstract: A substrate has an active region divided into storage node contact junction regions, channel regions and a bit line contact junction region. Device isolation layers are formed in the substrate isolating the active region from a neighboring active region Recess patterns are formed each in a trench structure and extending from a storage node contact junction region to a channel region Line type gate patterns, each filling a predetermined portion of the trench of the individual recess pattern, is formed in a direction crossing a major axis of the active region in an upper portion of the individual channel region.

Abstract: A substrate has an active region divided into storage node contact junction regions, channel regions and a bit line contact junction region. Device isolation layers are formed in the substrate isolating the active region from a neighboring active region Recess patterns are formed each in a trench structure and extending from a storage node contact junction region to a channel region Line type gate patterns, each filling a predetermined portion of the trench of the individual recess pattern, is formed in a direction crossing a major axis of the active region in an upper portion of the individual channel region.

Abstract: A substrate has an active region divided into storage node contact junction regions, channel regions and a bit line contact junction region. Device isolation layers are formed in the substrate isolating the active region from a neighboring active region Recess patterns are formed each in a trench structure and extending from a storage node contact junction region to a channel region Line type gate patterns, each filling a predetermined portion of the trench of the individual recess pattern, is formed in a direction crossing a major axis of the active region in an upper portion of the individual channel region.

Abstract: A semiconductor device and a method for fabricating the same are provided. The method includes: forming a plurality of protruded patterns smaller than gate structures by selectively removing predetermined portions of a substrate; and forming the gate structures over the protruded patterns. The semiconductor device includes: a plurality of protruded substrate portions smaller than the gate structures; and a plurality of gate structures encompassing the protruded substrate portions, wherein channels are formed on surfaces of the protruded substrate portion.

Abstract: The present invention relates to an alignment mark for use in a wafer alignment and a method for fabricating the same. The alignment mark for use in the wafer alignment includes: a first mark formed on a semiconductor layer; a second mark formed adjacent to the first mark on the semiconductor layer; and a concave part formed between the first mark and the second mark by etching a partial portion of the semiconductor layer, wherein the alignment mark is used to align a wafer by detecting a zeroth order diffract light reflected from a sloped surface formed because of a difference in height between the concave part and the first or second mark.

Abstract: The present invention relates to an alignment mark for use in a wafer alignment and a method for fabricating the same. The alignment mark for use in the wafer alignment includes: a first mark formed on a semiconductor layer; a second mark formed adjacent to the first mark on the semiconductor layer; and a concave part formed between the first mark and the second mark by etching a partial portion of the semiconductor layer, wherein the alignment mark is used to align a wafer by detecting a zeroth order diffract light reflected from a sloped surface formed because of a difference in height between the concave part and the first or second mark.

Abstract: A multi-use holder of a particle inspection device and an inspection method using the same can inspect both a wafer and a photomask using a scattering type inspection device since the scattering of a laser light irradiated from a light source can be avoided by fabricating the multi-use holder in a wafer shape, providing a second mounting portion and a first mounting portion on the upper surface thereof and forming a coating portion on the upper surface of the multi-use holder thereon when disposing the multi-use holder on a chuck fixed to a supporter by a vacuum generator, thereby reducing costs and improving productivity.