Abstract: An apparatus is disclosed for adaptive multi-mode charging. In an example aspect, the apparatus includes at least one charger having a first node and a second node. The at least one charger is configured to accept an input voltage at the first node. The at least one charger is also configured to selectively operate in a first mode to generate a first output voltage at the second node that is greater than or less than the input voltage or operate in a second mode to generate a second output voltage at the second node that is substantially equal to the input voltage.

Abstract: A three-level buck converter circuit configurable to transition between a three-level buck converter mode and a two-level buck converter mode and methods for regulating power using such a circuit. One example power supply circuit generally includes a three-level buck converter circuit and a control circuit coupled to the three-level buck converter circuit and configured to control operation of the three-level buck converter circuit between a three-level buck converter mode and a two-level buck converter mode. The three-level buck converter circuit generally includes a first switch, a second switch coupled to the first switch via a first node, a third switch coupled to the second switch via a second node, a fourth switch coupled to the third switch via a third node, a first capacitive element coupled between the first node and the third node, and an inductive element coupled between the second node and an output node.

Abstract: A three-level buck converter circuit configurable to transition between a three-level buck converter mode and a two-level buck converter mode and methods for regulating power using such a circuit. One example power supply circuit generally includes a three-level buck converter circuit and a control circuit coupled to the three-level buck converter circuit and configured to control operation of the three-level buck converter circuit between a three-level buck converter mode and a two-level buck converter mode. The three-level buck converter circuit generally includes a first switch, a second switch coupled to the first switch via a first node, a third switch coupled to the second switch via a second node, a fourth switch coupled to the third switch via a third node, a first capacitive element coupled between the first node and the third node, and an inductive element coupled between the second node and an output node.

Abstract: Techniques and apparatus for current-based transitioning between a buck converter mode and a charge pump mode in an adaptive combination power supply circuit. One example power supply circuit generally includes a switching regulator and control logic coupled to the switching regulator. The control logic is generally configured to compare an indication of a current associated with the switching regulator to a threshold and to control a transition of the switching regulator between a buck converter mode and a charge pump mode based on the comparison.

Abstract: A three-level buck converter circuit configurable to transition between a three-level buck converter mode and a two-level buck converter mode and methods for regulating power using such a circuit. One example power supply circuit generally includes a three-level buck converter circuit and a control circuit coupled to the three-level buck converter circuit and configured to control operation of the three-level buck converter circuit between a three-level buck converter mode and a two-level buck converter mode. The three-level buck converter circuit generally includes a first switch, a second switch coupled to the first switch via a first node, a third switch coupled to the second switch via a second node, a fourth switch coupled to the third switch via a third node, a first capacitive element coupled between the first node and the third node, and an inductive element coupled between the second node and an output node.

Abstract: Certain aspects of the present disclosure generally relate to soft starting a switched-mode power supply (SMPS) circuit operating as a charge pump in a reverse multiply-by-two mode. One example SMPS circuit generally includes a plurality of transistors, a capacitive element coupled to the plurality of transistors, and a current sink coupled between the capacitive element and a reference potential node for the SMPS circuit. For certain aspects, the current sink is configured to be enabled during a first phase of a soft start operation for the SMPS circuit, but is configured to be disabled during a second phase of the soft start operation and during normal operation for the SMPS circuit.

Abstract: A method of operating a buck converter is disclosed. The buck converter includes a first capacitor, a second capacitor, and an inductor between a node and an output of the buck converter. The method includes, during a first portion of a cycle, coupling the first capacitor and the second capacitor in series between an input of the buck converter and a ground, wherein the first capacitor is coupled between the input of the buck converter and the node, and the second capacitor is coupled between the node and the ground. The method also includes, during a second portion of the cycle, coupling the second capacitor and the first capacitor in series between the input of the buck converter and the ground, wherein the second capacitor is coupled between the input of the buck converter and the node, and the first capacitor is coupled between the node and the ground.

Abstract: Techniques and apparatus for current-based transitioning between a buck converter mode and a charge pump mode in an adaptive combination power supply circuit. One example power supply circuit generally includes a switching regulator and control logic coupled to the switching regulator. The control logic is generally configured to compare an indication of a current associated with the switching regulator to a threshold and to control a transition of the switching regulator between a buck converter mode and a charge pump mode based on the comparison.

Abstract: Certain aspects of the present disclosure generally relate to soft starting a switched-mode power supply (SMPS) circuit operating as a charge pump in a reverse multiply-by-two mode. One example SMPS circuit generally includes a plurality of transistors, a capacitive element coupled to the plurality of transistors, and a current sink coupled between the capacitive element and a reference potential node for the SMPS circuit. For certain aspects, the current sink is configured to be enabled during a first phase of a soft start operation for the SMPS circuit, but is configured to be disabled during a second phase of the soft start operation and during normal operation for the SMPS circuit.

Abstract: A method of operating a buck converter is disclosed. The buck converter includes a first capacitor, a second capacitor, and an inductor between a node and an output of the buck converter. The method includes, during a first portion of a cycle, coupling the first capacitor and the second capacitor in series between an input of the buck converter and a ground, wherein the first capacitor is coupled between the input of the buck converter and the node, and the second capacitor is coupled between the node and the ground. The method also includes, during a second portion of the cycle, coupling the second capacitor and the first capacitor in series between the input of the buck converter and the ground, wherein the second capacitor is coupled between the input of the buck converter and the node, and the first capacitor is coupled between the node and the ground.

Abstract: An apparatus is disclosed for adaptive multi-mode charging. In an example aspect, the apparatus includes at least one charger having a first node and a second node. The at least one charger is configured to accept an input voltage at the first node. The at least one charger is also configured to selectively operate in a first mode to generate a first output voltage at the second node that is greater than or less than the input voltage or operate in a second mode to generate a second output voltage at the second node that is substantially equal to the input voltage.

Abstract: An apparatus for generating an output voltage across a load. The apparatus includes a first switching device; a second switching device coupled in series with the first switching device between an upper voltage rail and a lower voltage rail, wherein the upper voltage rail is configured to receive an input voltage; an inductor between a node between the first and second switching device and the load; a sensor configured to generate a control signal related to a current through the inductor; and a controller configured to operate the first and second switching devices to generate the output voltage based on the control signal.

Abstract: Techniques and apparatus for sensing and/or maintaining a differential voltage across a flying capacitor in a switched-mode power supply circuit (SMPS) when operating in certain modes (e.g., full duty mode). One example power supply circuit generally includes a first transistor, a second transistor coupled to the first transistor via a first node, a third transistor coupled to the second transistor via a second node, a fourth transistor coupled to the third transistor via a third node, a first capacitive element having a first terminal coupled to the first node and having a second terminal coupled to the third node, and a voltage control circuit coupled to the first capacitive element and configured to maintain a defined voltage across the first capacitive element. The power supply circuit may further include a switched-capacitor circuit coupled to the first capacitive element and configured to sense a differential voltage across the first capacitive element.

Abstract: Enhanced reverse boosting detection in a wireless charging scheme is disclosed. In some implementations, a minimum mid-level input voltage regulation (VMID_MIN regulation) loop is provided to regulate an input voltage from a wirelessly coupled power source when a mid-level of the input voltage falls below a predetermined threshold. The input voltage is provided to a buck converter within a wireless charging receiver. An input missing poller signal generator is provided to generate an input missing poller (IMP) signal if the VMID_MIN regulation loop becomes active and the buck converter has entered a discontinuous mode.

Abstract: Enhanced reverse boosting detection in a wireless charging scheme is disclosed. In some implementations, a minimum mid-level input voltage regulation (VMID_MIN regulation) loop is provided to regulate an input voltage from a wirelessly coupled power source when a mid-level of the input voltage falls below a predetermined threshold. The input voltage is provided to a buck converter within a wireless charging receiver. An input missing poller signal generator is provided to generate an input missing poller (IMP) signal if the VMID_MIN regulation loop becomes active and the buck converter has entered a discontinuous mode.

Abstract: A multiple power mode amplifier provides a low and a high power mode without using switches. This amplifier may be used in radio frequency (RF) applications such as mobile telephones, pagers, portable digital assistants, and wireless e-mail devices. In the low power mode, the power consumption of the amplifier is reduced, which will increase operation time, especially important for battery-operated devices. In one implementation, the amplifier includes a number of impedance matching network units (130, 140, 150, and 160), impedance transformer (170), and a power stage (120). An implementation provides further power consumption savings by modulating a bias of an amplifier stage.

Abstract: A multiple power mode amplifier provides a low and a high power mode without using switches. This amplifier may be used in radio frequency (RF) applications such as mobile telephones, pagers, portable digital assistants, and wireless e-mail devices. In the low power mode, the power consumption of the amplifier is reduced, which will increase operation time, especially important for battery-operated devices. In one implementation, the amplifier includes a number of impedance matching network units (130, 140, 150, and 160), impedance transformer (170), and a power stage (120). An implementation provides further power consumption savings by modulating a bias of an amplifier stage.

Abstract: A multiple power mode amplifier provides a low and a high power mode without using switches. This amplifier may be used in radio frequency (RF) applications such as mobile telephones, pagers, portable digital assistants, and wireless e-mail devices. In the low power mode, the power consumption of the amplifier is reduced, which will increase operation time, especially important for battery-operated devices. In one implementation, the amplifier includes a number of impedance matching network units (130, 140, 150, and 160), impedance transformer (170), and a power stage (120). An implementation provides further power consumption savings by modulating a bias of an amplifier stage.

Abstract: A multiple power mode amplifier provides a low and a high power mode without using switches. This amplifier may be used in radio frequency (RF) applications such as mobile telephones, pagers, portable digital assistants, and wireless e-mail devices. In the low power mode, the power consumption of the amplifier is reduced, which will increase operation time, especially important for battery-operated devices. In one implementation, the amplifier includes a number of impedance matching network units (130, 140, 150, and 160), impedance transformer (170), and a power stage (120). An implementation provides further power consumption savings by modulating a bias of an amplifier stage.

Abstract: A multiple power mode amplifier provides a low and a high power mode without using switches. This amplifier may be used in radio frequency (RF) applications such as mobile telephones, pagers, portable digital assistants, and wireless e-mail devices. In the low power mode, the power consumption of the amplifier is reduced, which will increase operation time, especially important for battery-operated devices. In one implementation, the amplifier includes a number of impedance matching network units (130, 140, 150, and 160), impedance transformer (170), and a power stage (120). An implementation provides further power consumption savings by modulating a bias of an amplifier stage.