Patents by Inventor Santiago Iriarte
Santiago Iriarte has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240103551Abstract: The present subject matter relates to an electronic system comprising gated circuitry, a first regulator circuit directly coupled to the gated circuitry, always-on circuitry, a second regulator circuit directly coupled to the always-on circuitry, and a switch circuit coupled between an output of the first regulator circuit and an output of the second regulator circuit. The always-on circuitry includes control logic configured to activate the second regulator circuit and deactivate the first regulator circuit and the switch circuit in a sleep mode and activate the first regulator circuit and the switch circuit in an active mode.Type: ApplicationFiled: July 10, 2023Publication date: March 28, 2024Inventors: Jose Tejada Gomez, Santiago Iriarte, Ruben Salvador
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Patent number: 11552586Abstract: The present disclosure provides a feedback control system and method for a bidirectional VCM. The system employs an analog core that is common to both the PWM and linear modes of operation. The analog core includes a feedback mechanism that determines the error in the current flowing through the motor. The feedback mechanism produces an error voltage that corresponds to the current error, and applies the voltage to a control driver. The control driver then controls the motor, based on the error voltage, in either a PWM or linear mode. By sharing a common core, the switching time between modes is improved. Furthermore, the output current error between modes is reduced.Type: GrantFiled: October 7, 2019Date of Patent: January 10, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Jesus Javier Lopez, Alberto Marinas, Eduardo M. Martinez, Santiago Iriarte
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Patent number: 10715147Abstract: A line driver circuit is configured to provide a high spurious free dynamic range output and includes first and second output transistors and a control circuit. The first output transistor is controllable to pull an output node to a logic high state, and the second output transistor is controllable to pull the output node to a logic low state. The first control circuit is connected to a control input of the first output transistor and configured to establish a control signal at the control input of the first output transistor while the second output transistor is in a low impedance operating state to reduce an imbalance in turn-on delay between the first output transistor and the second output transistor.Type: GrantFiled: September 9, 2019Date of Patent: July 14, 2020Assignee: Analog Devices International Unlimited CompanyInventors: Jose Tejada, Santiago Iriarte, Miguel A. Ruiz
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Publication number: 20200112277Abstract: The present disclosure provides a feedback control system and method for a bidirectional VCM. The system employs an analog core that is common to both the PWM and linear modes of operation. The analog core includes a feedback mechanism that determines the error in the current flowing through the motor. The feedback mechanism produces an error voltage that corresponds to the current error, and applies the voltage to a control driver. The control driver then controls the motor, based on the error voltage, in either a PWM or linear mode. By sharing a common core, the switching time between modes is improved. Furthermore, the output current error between modes is reduced.Type: ApplicationFiled: October 7, 2019Publication date: April 9, 2020Applicant: Analog Devices Global Unlimited CompanyInventors: Jesus Javier LOPEZ, Alberto MARINAS, Eduardo M. MARTINEZ, Santiago IRIARTE
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Patent number: 10439539Abstract: The present disclosure provides a feedback control system and method for a bidirectional VCM. The system employs an analog core that is common to both the PWM and linear modes of operation. The analog core includes a feedback mechanism that determines the error in the current flowing through the motor. The feedback mechanism produces an error voltage that corresponds to the current error, and applies the voltage to a control driver. The control driver then controls the motor, based on the error voltage, in either a PWM or linear mode. By sharing a common core, the switching time between modes is improved. Furthermore, the output current error between modes is reduced.Type: GrantFiled: April 21, 2016Date of Patent: October 8, 2019Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANYInventors: Jesus Javier Lopez, Alberto Marinas, Eduardo M. Martinez, Santiago Iriarte
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Patent number: 9632521Abstract: A voltage generator is provided which is reliable, self starting and only requires a few components. The voltage generator comprises a first stage that provides a current to a second stage. The first stage has a temperature coefficient of one sign, such as positive, and the second stage has an opposing temperature coefficient, e.g. negative. The responses are summed such that the overall temperature coefficient is reduced.Type: GrantFiled: March 11, 2014Date of Patent: April 25, 2017Assignee: Analog Devices GlobalInventors: Santiago Iriarte, Ramon Tortosa Navas, Enrique Company Bosch
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Patent number: 9525407Abstract: A power supply monitoring circuit for monitoring a voltage at a power supply node compared to a reference node, the power supply monitoring circuit comprising a first field effect transistor and first and second voltage dropping components arranged in current flow communication between the power supply node and the reference node and each having first and second nodes, and wherein a first node of the first voltage dropping component is connected to one of the first and second nodes of the field effect transistor, and a gate of the field effect transistor is connected to the second node of the first voltage dropping component, and an output signal is taken from a connection made with the first field effect transistor.Type: GrantFiled: March 11, 2014Date of Patent: December 20, 2016Assignee: Analog Devices GlobalInventors: Santiago Iriarte, John A. Cleary
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Patent number: 9513246Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.Type: GrantFiled: December 11, 2015Date of Patent: December 6, 2016Assignee: Analog Devices, Inc.Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
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Publication number: 20160344327Abstract: The present disclosure provides a feedback control system and method for a bidirectional VCM. The system employs an analog core that is common to both the PWM and linear modes of operation. The analog core includes a feedback mechanism that determines the error in the current flowing through the motor. The feedback mechanism produces an error voltage that corresponds to the current error, and applies the voltage to a control driver. The control driver then controls the motor, based on the error voltage, in either a PWM or linear mode. By sharing a common core, the switching time between modes is improved. Furthermore, the output current error between modes is reduced.Type: ApplicationFiled: April 21, 2016Publication date: November 24, 2016Applicant: ANALOG DEVICES GLOBALInventors: JESUS JAVIER LOPEZ, ALBERTO MARINAS, EDUARDO M. MARTINEZ, SANTIAGO IRIARTE
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Publication number: 20160109399Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.Type: ApplicationFiled: December 11, 2015Publication date: April 21, 2016Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
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Patent number: 9267915Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.Type: GrantFiled: January 12, 2015Date of Patent: February 23, 2016Assignee: ANALOG DEVICES, INC.Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
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Patent number: 9098104Abstract: A low drop out voltage regulator comprising: a transistor having an input node, an output node, and a control node; a differential amplifier having an output connected to the control node of the transistor and having a first input node; and a feedback capacitor connected between the output node of the transistor and the first input of the differential amplifier, wherein a voltage at the output of the transistor is dependent on a charge across the feedback capacitor.Type: GrantFiled: March 7, 2013Date of Patent: August 4, 2015Assignee: ANALOG DEVICES GLOBALInventors: Ramon Tortosa Navas, Enrique Company Bosch, Santiago Iriarte
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Patent number: 9041150Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.Type: GrantFiled: September 30, 2013Date of Patent: May 26, 2015Assignee: Analog Devices, Inc.Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
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Publication number: 20150121995Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.Type: ApplicationFiled: January 12, 2015Publication date: May 7, 2015Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
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Patent number: 8957497Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.Type: GrantFiled: February 25, 2014Date of Patent: February 17, 2015Assignee: Analog Devices, Inc.Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
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Patent number: 8928296Abstract: A low dropout voltage regulator (LDO) includes first and second amplifiers and a current mirror. The first amplifier includes a first input receiving a reference voltage and a second input receiving a voltage proportional to an output of the LDO. The current mirror includes an input current at a first end of the current mirror to an output current at a second end of the current mirror, the input current controlled by an output of the first amplifier and the output current being supplied to the output of the LDO. The second amplifier includes a first input coupled to the first end of the current mirror and a second input coupled to the second end of the current mirror.Type: GrantFiled: May 20, 2011Date of Patent: January 6, 2015Assignee: Analog Devices, Inc.Inventors: Santiago Iriarte, Alberto Marinas
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Patent number: 8890285Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.Type: GrantFiled: September 30, 2013Date of Patent: November 18, 2014Assignee: Analog Devices, Inc.Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
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Patent number: 8890286Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.Type: GrantFiled: February 25, 2014Date of Patent: November 18, 2014Assignee: Analog Devices, Inc.Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
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Patent number: 8866499Abstract: A system and method for testing capacitance of a load circuit connected to an output pin of a driving circuit In one embodiment, the method may comprise driving a voltage at the output pin to a first voltage; a predetermined current to the output pin; comparing the voltage at the output pin to a reference voltage; and when the voltage at the output pin matches the reference voltage, generating an estimate of capacitance present at the output pin based on a number of clock cycles occurring between an onset of a timed voltage change period and a time at which the voltage at the output pin matches the reference voltage.Type: GrantFiled: August 27, 2009Date of Patent: October 21, 2014Assignee: Analog Devices, Inc.Inventors: Santiago Iriarte, Mark Murphy
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Patent number: 8853799Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.Type: GrantFiled: September 30, 2013Date of Patent: October 7, 2014Assignee: Analog Devices, Inc.Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English