Patents by Inventor Satish Thatte

Satish Thatte has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060123333
    Abstract: Herein is described an implementation of an object persister, which serializes an object to preserve the object's data structure and its current data. The serialized object is encoded using XML and inserted within a message. That message is transmitted to an entity over a network. Such a transmission is performed using standard Internet protocols, such as HTML. Upon receiving the serialized object, the receiving entity deserializes the object to use it. Rather than include copies of referenced objects within the serialized object, the object persister includes references to those objects. This avoids redundant inclusion of the same object and potentially infinite inclusion of the object itself that is being serialized.
    Type: Application
    Filed: July 16, 2004
    Publication date: June 8, 2006
    Applicant: Microsoft Corporation
    Inventors: Andrew Layman, Gopal Kakivaya, Satish Thatte
  • Publication number: 20060085560
    Abstract: Signals are mapped from one protocol to another protocol. A first protocol is received, and a mapping interface is generated to a second protocol. The first protocol is then mapped to the second protocol in accordance with the mapping interface. The mapping interface may comprise a coordination map. Moreover, a state diagram may be generated that is based on the first protocol, prior to mapping the first protocol to the second protocol. The first protocol may be an abstract protocol or a web services business activity protocol, for example, and the second protocol may be another abstract protocol, a concrete interface, a web services interface, a common language runtime interface, or a business process execution language for web services, for example.
    Type: Application
    Filed: October 1, 2004
    Publication date: April 20, 2006
    Applicant: Microsoft Corporation
    Inventors: David Langworthy, Satish Thatte
  • Publication number: 20060074731
    Abstract: Designing and executing a workflow having flow-based and constraint-based regions. A user selects one or more activities to be part of a constraint-based region. Each constraint-based region has a constraint associated therewith. The workflow is executed by executing the flow-based region and the constraint-based region. The flow-based region executes sequentially. The constraint is evaluated, and the constraint-based region executes responsive to the evaluated constraint.
    Type: Application
    Filed: January 31, 2005
    Publication date: April 6, 2006
    Applicant: Microsoft Corporation
    Inventors: David Green, Bimal Mehta, Satish Thatte, Dharma Shukla, Abhay Parasnis
  • Publication number: 20050193286
    Abstract: An error-handling framework is provided for business process transactions. The error-handling framework facilitates coordination of the invocation of exception and compensation handlers in response to errors. The error-handling framework includes support for custom ordering of compensation actions, data flow into and out of compensation actions, and management of the process state visible to compensation actions.
    Type: Application
    Filed: March 30, 2005
    Publication date: September 1, 2005
    Applicant: Microsoft Corporation
    Inventors: Satish Thatte, Lucius Meredith, Marc Levy, Bimal Mehta, Johannes Klein, Anthony Andrews
  • Publication number: 20050015776
    Abstract: An XLANG/s compiler detects convoy scenarios during compilation and generates runtime directives to correctly correlate incoming messages with business process instances. A convoy scenario, present in event driven processes, is defined by a correlation set initialized during a receive operation which is provided to a subsequent receive operation. The compiler detects those convoy scenarios by analyzing the control and dataflow of a XLANG/s program. Three convoy patterns are distinguished: (1) activation convoys, (2) uniform sequential convoys, and (3) non-uniform sequential convoys. XLANG/s allows declarative descriptions of convoy scenarios without requiring an understanding of the low-level details supporting their correct execution. Convoy scenarios are processed by statically analyzing a written workflow application to deduce the nature and type of convoy scenarios used by the application. Information is extracted at compile time to support the runtime infrastructure.
    Type: Application
    Filed: June 2, 2003
    Publication date: January 20, 2005
    Inventors: Bimal Mehta, Johannes Klein, Lee Graber, Paul Maybee, Sriram Balasubramanian, Sanjib Saha, Satish Thatte, Paul Ringseth
  • Patent number: 4757438
    Abstract: A computer system is provided which enables automatic memory operations independently of a CPU. The computer system includes a virtual machine and a logical memory system which is accessed by the virtual machine through a binding register unit, enabling the virtual machine to allocate blocks and specify the length of the blocks. Data within the blocks can also be specified by the user by relative indexing with respect to a block specifier in the binding register unit. The logical memory system is controlled by a separate memory management unit which manages the physical memory of the system and which manages the memory to have the logical memory system appearance to the virtual machine.
    Type: Grant
    Filed: July 12, 1984
    Date of Patent: July 12, 1988
    Assignee: Texas Instruments Incorporated
    Inventors: Satish Thatte, Donald W. Oxley
  • Patent number: 4695949
    Abstract: A method and apparatus for managing a block oriented memory of the type in which each memory block has an associated reference count representing the number of pointers to it from other memory blocks and itself. Efficient and cost-effective implementation of reference counting alleviates the need for frequent garbage collection, which is an expensive operation. The apparatus includes a hash table into which the virtual addresses of blocks of memory which equal zero are maintained. When the reference count of a block increases from zero, its virtual address is removed from the table. When the reference count of a block decreases to zero, its virtual address is inserted into the table. When the table is full, a reconciliation operation is performed to identify those addresses which are contained in a set of binding registers associated with the CPU, and any address not contained in the binding registers are evacuated into a garbage buffer for subsequent garbage collection operations.
    Type: Grant
    Filed: July 19, 1984
    Date of Patent: September 22, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Satish Thatte, Donald W. Oxley