Abstract: A semiconductor memory device comprises a stack structure including a plurality of layers vertically stacked on a substrate. Each of the plurality of layers includes a first dielectric layer, a semiconductor layer, and a second dielectric layer that are sequentially stacked, and a first conductive line in the second dielectric layer and extending in a first direction. The device also comprises a second conductive line extending vertically through the stack structure, and a capacitor in the stack structure and spaced apart from the second conductive line. The semiconductor layer comprises semiconductor patterns extending in a second direction intersecting the first direction between the first conductive line and the substrate. The second conductive line is between a pair of the semiconductor patterns adjacent to each other in the first direction. An end of each of the semiconductor patterns is electrically connected to a first electrode of the capacitor.

Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.

Abstract: A magnetic element, comprising: a coil having two terminal-ends, a core pressed and molded around the coil, and two terminal units connecting to the two terminal-ends of the coil, wherein a first concave portions is formed on a side surface of the core, a second concave portion for accommodating one of the two terminal-ends of the coil, is formed at a upper boundary of the first concave portion, and a third concave portion for accommodating one of the two terminal units, is formed at a upper boundary of the first concave portion and near the second concave portion.

Abstract: Semiconductor memory devices are provided. A semiconductor memory device includes an isolation layer in a first trench and a first gate electrode portion on the isolation layer. The semiconductor memory device includes a second gate electrode portion in a second trench. In some embodiments, the second gate electrode portion is wider, in a direction, than the first gate electrode portion. Moreover, in some embodiments, an upper region of the second trench is spaced apart from the first trench by a greater distance, in the direction, than a lower region of the second trench. Related methods of forming semiconductor memory devices are also provided.

Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.

Abstract: A semiconductor memory device includes a substrate having an active region, word lines extending across the active region, a bit line on the active region between the word lines, a bit line node contact between the bit line and the active region, and a storage node contact on an end portion of the active region, wherein one or more of the bit line node contact or the storage node contact include silicon germanium.

Abstract: Semiconductor memory devices are provided. A semiconductor memory device includes an isolation layer in a first trench and a first gate electrode portion on the isolation layer. The semiconductor memory device includes a second gate electrode portion in a second trench. In some embodiments, the second gate electrode portion is wider, in a direction, than the first gate electrode portion. Moreover, in some embodiments, an upper region of the second trench is spaced apart from the first trench by a greater distance, in the direction, than a lower region of the second trench. Related methods of forming semiconductor memory devices are also provided.

Abstract: An apparatus, system, and method of remotely monitoring receives, from an operation terminal, identification information and location information of a location of one or more lamps, stores, in a memory, the received identification information and the received location information in association with each other for the one or more lamps, updates log information regarding a log of a lighting condition of the one or more lamps, in response to an indication that an electric circuit of the one or more lamps is energized for the one or more lamps, and sends monitoring information corresponding to the log information of the electric circuit of the one or more lamps for display.

Abstract: Provided are a semiconductor device having a gate and a method of forming the same. The method includes forming a gate dielectric, forming a first conductive material layer on the gate dielectric, forming a source material layer on the first conductive material layer, and diffusing a first element included in the source material layer into the first conductive material layer by performing a thermal treatment process to form a doped material layer.

Abstract: An electronic component includes; a magnetic-body core having a plate-shaped portion and a core portion which extends from an upper surface of the plate-shaped portion; a winding wire which includes a wound portion wound by a rectangular wire into an Edgewise winding form and two non-wound portions extending from the wound portion to two distal ends, and the core portion is inserted through the wound portion; and a magnetic exterior body which covers at least the wound portion and the core portion. The two non-wound portions are respectively arranged along a bottom surface and at least one of the side surfaces of the plate-shaped portion. Parts of the two non-wound portions arranged along the bottom surface are electrodes.

Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.

Abstract: An apparatus, system, and method of remotely monitoring receives, from an operation terminal, identification information and location information of a location of one or more lamps, stores, in a memory, the received identification information and the received location information in association with each other for the one or more lamps, updates log information regarding a log of a lighting condition of the one or more lamps, in response to an indication that an electric circuit of the one or more lamps is energized for the one or more lamps, and sends monitoring information corresponding to the log information of the electric circuit of the one or more lamps for display.

Abstract: The object of the present invention is to provide a touch panel member that is excellent in terms of suppression of visibility of a transparent electrode and has low total reflection for visible light, and a touch panel and a touch panel display device having the touch panel member. The touch panel member of the present invention comprises, in order, at least a transparent substrate, a transparent electrode, and a protective layer provided so as to cover the transparent electrode and having a thickness of 0.04 to 10 ?m, at least part of the protective layer having a refractive index that decreases continuously from the transparent substrate side toward the side opposite to the transparent substrate, and the protective layer satisfying specific expressions.

Abstract: Provided are a semiconductor device having a gate and a method of forming the same. The method includes forming a gate dielectric, forming a first conductive material layer on the gate dielectric, forming a source material layer on the first conductive material layer, and diffusing a first element included in the source material layer into the first conductive material layer by performing a thermal treatment process to form a doped material layer.

Abstract: An electronic component includes; a magnetic-body core having a plate-shaped portion and a core portion which extends from an upper surface of the plate-shaped portion; a winding wire which includes a wound portion wound by a rectangular wire into an Edgewise winding form and two non-wound portions extending from the wound portion to two distal ends, and the core portion is inserted through the wound portion; and a magnetic exterior body which covers at least the wound portion and the core portion. The two non-wound portions are respectively arranged along a bottom surface and at least one of the side surfaces of the plate-shaped portion. Parts of the two non-wound portions arranged along the bottom surface are electrodes.

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor.

Abstract: A coil component including a coil formed by winding an insulation-coated wire and a composite magnetic body embed with the coil, wherein the composite magnetic body contains: a metallic magnetic powder made by powderizing a metallic magnetic material and a binder resin; and wherein the average particle size D50[?m] of the metallic magnetic powder satisfies the following formula (1): D50?2.192×(Fmax)?0.518×?0.577??(1) wherein (Fmax) is an upper limit operation-frequency [MHz] at which Q-value starts decreasing beyond the maximum value in a case of increasing the frequency applied to the coil component, and “?” is electrical-resistivity [??·cm] of the metallic magnetic material.

Abstract: A semiconductor device including a semiconductor substrate including a trench, the semiconductor substrate having a crystal structure; and an insulating layer covering an inner sidewall of the trench, wherein the inner sidewall of the trench has at least one plane included in a {320} family of planes of the crystal structure or at least one plane similar to the {320} family of planes.

Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.

Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.