Abstract: Techniques are provided for an access device, such as a Serial Attached Small Computer System Interface (SAS) expander, that is in communication with a storage device to subdivide the storage space of the storage device into a plurality of logical storage spaces, where the access device mediates storage and retrieval of data to and from the storage device. The access device maintains a unique identifier assigned to each of the logical storage spaces. Storage and retrieval of data to and from at least one of the logical storage spaces by way of the access device is based on the assigned unique identifier. The storage space may be subdivided using logical block addresses (LBAs) of the storage device without physically partitioning the available storage on the storage device.

Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving a memory request from a memory controller over a channel. Based on the memory request, the example embodiment includes selecting a location in memory to couple to a sub-channel of the channel and configuring the set of field effect transistors to couple the channel with the sub-channel. In the example embodiment, data may be allowed to flow between the memory controller and the location in the memory over the channel and the sub-channel.

Abstract: Data storage devices are disclosed. A plurality of memory controllers are operatively coupled to a plurality of solid state memory devices. The plurality of memory controllers are configured to access data stored by the plurality of solid state memory devices. A first selection circuit is operatively coupled to the plurality of memory controllers. The first selection circuit is configured to activate each of the plurality of memory controllers selectively. A drive body includes the plurality of solid state memory devices, the plurality of memory controllers. The drive body further includes an interface operatively coupled to the selection circuit. The interface receives signals that cause the first selection circuit to activate a selected memory controller.

Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving a memory request from a memory controller over a channel. Based on the memory request, the example embodiment includes selecting a location in memory to couple to a sub-channel of the channel and configuring the set of field effect transistors to couple the channel with the sub-channel. In the example embodiment, data may be allowed to flow between the memory controller and the location in the memory over the channel and the sub-channel.

Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving a memory request from a memory controller over a channel. Based on the memory request, the example embodiment includes selecting a location in memory to couple to a sub-channel of the channel and configuring the set of field effect transistors to couple the channel with the sub-channel. In the example embodiment, data may be allowed to flow between the memory controller and the location in the memory over the channel and the sub-channel.

Abstract: Techniques are provided for an access device, such as a Serial Attached Small Computer System Interface (SAS) expander, that is in communication with a storage device to subdivide the storage space of the storage device into a plurality of logical storage spaces, where the access device mediates storage and retrieval of data to and from the storage device. The access device maintains a unique identifier assigned to each of the logical storage spaces. Storage and retrieval of data to and from at least one of the logical storage spaces by way of the access device is based on the assigned unique identifier. The storage space may be subdivided using logical block addresses (LBAs) of the storage device without physically partitioning the available storage on the storage device.

Abstract: In one embodiment, a method includes determining if a power load requirement associated with a server arrangement is below a threshold. The server arrangement includes at least a first power supply and a second power supply, as well as a capacitor arrangement. The method also includes providing power to the server arrangement using the first power supply and not the second power supply when it is determined that the power load requirement is below the threshold, and providing the power to the server arrangement using the first power supply and the second power supply when it is determined that the power load requirement is not below the threshold.

Abstract: A server power manager and method for dynamic server power management are generally described herein. The server power manager is configured to implement one or more server management policies that identify target server power consumption and/or target functionality for the server system. The server power manager determines an amount of excess processing capability and/or an amount of excess physical memory based on the target server power consumption and the target functionality. The server power manager may transition a processor core to a lower-operational state when at least a predetermined amount of excess processing capability is determined while maintaining server system functionality. The server power manager may transition a memory module to a lower-operational state when at least a predetermined amount of excess physical memory is determined while maintaining the server system functionality.

Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving first initialization data from a physical dual inline memory module (DIMM) and converting the first initialization data to second initialization data of a logical DIMM mapped to the physical DIMM. The example embodiment may further include programming a memory controller based on the second initialization data.

Abstract: In one embodiment, a method includes obtaining a request for data, determining if the data is present in a physical memory, and obtaining the data from a non-volatile random access memory if it is determined that the data is not present in the physical memory. The request is obtained by an overall system that includes the physical memory and the non-volatile random access memory, and the overall system is configured to push information from the physical memory to the non-volatile random access memory.

Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes detecting a memory command directed to a logical rand and a number of physical ranks mapped to the logical rank. The example embodiment may also include issuing the memory command to the number of physical ranks based on determining that the memory command is to be issued to the number of physical ranks.

Abstract: In one embodiment, a method includes determining if a power load requirement associated with a server arrangement is below a threshold. The server arrangement includes at least a first power supply and a second power supply, as well as a capacitor arrangement. The method also includes providing power to the server arrangement using the first power supply and not the second power supply when it is determined that the power load requirement is below the threshold, and providing the power to the server arrangement using the first power supply and the second power supply when it is determined that the power load requirement is not below the threshold.

Abstract: An I/O module configured to operate in a memory module socket and method for extending a memory interface are generally described herein. The I/O module may include a serial-presence detection (SPD) device to indicate that the I/O module is an I/O device and to indicate one or more functions associated with the I/O module. The I/O module may also include a serial data controller to communicate serial data in accordance with a predetermined communication technique with a configurable switch of a host system over preselected system management (SM) bus address lines and unused system clock signal lines of the memory module socket. The predetermined communication technique may include a peripheral component interconnect express (PCIe), a Serial Advanced Technology Attachment (SATA), a Serial Attached Small Computer System Interface (SAS), a universal-serial bus (USB) or a switched-fabric (InfiniBand) communication technique.

Abstract: An I/O module configured to operate in a memory module socket and method for extending a memory interface are generally described herein. The I/O module may include a serial-presence detection (SPD) device to indicate that the I/O module is an I/O device and to indicate one or more functions associated with the I/O module. The I/O module may also include a serial data controller to communicate serial data in accordance with a predetermined communication technique with a configurable switch of a host system over preselected system management (SM) bus address lines and unused system clock signal lines of the memory module socket. The predetermined communication technique may include a peripheral component interconnect express (PCIe), a Serial Advanced Technology Attachment (SATA), a Serial Attached Small Computer System Interface (SAS), a universal-serial bus (USB) or a switched-fabric (InfiniBand) communication technique.

Abstract: Embodiments of an I/O module, processing platform, and method for extending a memory interface are generally described herein. In some embodiments, the I/O module may be configured to operate in a memory module socket, such as a DIMM socket, to provide increased I/O functionality in a host system. Some system management bus address lines and some unused system clock signal lines may be reconfigured as serial data lines for serial data communications between the I/O module and a PCIe switch of the host system.

Abstract: A server power manager and method for dynamic server power management are generally described herein. The server power manager is configured to implement one or more server management policies that identify target server power consumption and/or target functionality for the server system. The server power manager determines an amount of excess processing capability and/or an amount of excess physical memory based on the target server power consumption and the target functionality. The server power manager may transition a processor core to a lower-operational state when at least a predetermined amount of excess processing capability is determined while maintaining server system functionality. The server power manager may transition a memory module to a lower-operational state when at least a predetermined amount of excess physical memory is determined while maintaining the server system functionality.

Abstract: Embodiments of an I/O module, processing platform, and method for extending a memory interface are generally described herein. In some embodiments, the I/O module may be configured to operate in a memory module socket, such as a DIMM socket, to provide increased I/O functionality in a host system. Some system management bus address lines and some unused system clock signal lines may be reconfigured as serial data lines for serial data communications between the I/O module and a PCIe switch of the host system.

Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes detecting a memory command directed to a logical rand and a number of physical ranks mapped to the logical rank. The example embodiment may also include issuing the memory command to the number of physical ranks based on determining that the memory command is to be issued to the number of physical ranks.

Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving first initialization data from a physical dual inline memory module (DIMM) and converting the first initialization data to second initialization data of a logical DIMM mapped to the physical DIMM. The example embodiment may further include programming a memory controller based on the second initialization data.

Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving a memory request from a memory controller over a channel. Based on the memory request, the example embodiment includes selecting a location in memory to couple to a sub-channel of the channel and configuring the set of field effect transistors to couple the channel with the sub-channel. In the example embodiment, data may be allowed to flow between the memory controller and the location in the memory over the channel and the sub-channel.