Abstract: The present invention relates to a polyarylene sulfide which has more improved compatibility with other polymer materials or fillers, and a method for preparing the same. The polyarylene sulfide is characterized in that at least part of end groups of the main chain of the polyarylene sulfide is hydroxyl group (—OH), the polyarylene sulfide contains iodine bonded to its main chain and free iodine, and the content of iodine bonded to the main chain and free iodine is 10 to 10,000 ppmw.

Abstract: The present invention relates to a polyarylene sulfide resin composition having good processability and showing excellent properties due to its more improved miscibility with other polymer materials or fillers, and a formed article. Such polyarylene sulfide resin composition includes a polyarylene sulfide including a disulfide repeating unit in the repeating units of the main chain; and at least one component selected from the group consisting of a thermoplastic resin, a thermoplastic elastomer, and a filler.

Abstract: A semiconductor device according to an embodiment includes a substrate, a bit line structure and a source line structure respectively extending in a direction perpendicular to a surface of the substrate, a semiconductor layer disposed between the bit line structure and the source line structure on a plane parallel to the surface of the substrate, a first ferroelectric layer disposed on a first surface of the semiconductor layer, and a first gate electrode layer disposed on the first ferroelectric layer.

Abstract: A nonvolatile memory device according to an embodiment includes a substrate, and a gate structure disposed on the substrate and including a hole pattern. The gate structure includes at least one gate electrode layer and at least one interlayer insulation layer which are alternately stacked, and the gate electrode layer protrudes toward a center of the hole pattern relative to the interlayer insulation layer. The nonvolatile memory device includes a first functional layer disposed along a sidewall surface of the gate structure inside the hole pattern, a second functional layer disposed on the first functional layer inside the hole pattern, and a channel layer extending in a direction perpendicular to the substrate inside the hole pattern and disposed to contact a cell portion of the second functional layer. The cell portion of the second functional layer indirectly covers a sidewall surface of the gate electrode layer.

Abstract: A nonvolatile memory device according to an embodiment includes a substrate having an upper surface, a source electrode structure disposed on the substrate, and a channel structure disposed over the substrate and disposed to contact one sidewall surface of the source electrode structure. In addition, the nonvolatile memory device includes a drain electrode structure disposed to contact one sidewall surface of the channel structure over the substrate. In addition, the nonvolatile memory device includes a plurality of ferroelectric structures extending in a first direction perpendicular to the substrate in the channel structure and disposed to be spaced apart from each other along the second direction perpendicular to the first direction. In addition, the nonvolatile memory device includes a gate electrode structure disposed in each of the plurality of ferroelectric structure to extend along the first direction.

Abstract: An automated guided vehicle for transporting an object to a facility according to an embodiment of the present disclosure includes a main body, a shaft provided in the main body for guiding movement of the object to the facility and to face a front direction of the main body, a camera provided at one end of the shaft for photographing a front direction of the main body, and a position adjustment module for decoding an identifier when an image photographed by the camera includes the identifier displayed on the facility, and using a result of the decoding to adjust a position, toward which the one end of the shaft is directed.

Abstract: An antenna package having a cavity structure is provided, wherein a cavity substrate having an accommodation portion formed therethrough is disposed on one surface of an antenna substrate having a signal processing element formed thereon, so as to prevent occurrence of deformation and breakage thereof in the process of mounting the antenna package. The provided antenna package having the cavity structure comprises: an antenna substrate, on the upper surface of which multiple radiation patches are formed and on the lower surface of which multiple signal processing elements are formed; and a cavity substrate which has an accommodation portion formed therethrough to receive the multiple signal processing elements and is disposed on the lower surface of the antenna substrate.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an electrode stack disposed on the substrate, the electrode stack including an interlayer insulation layer and a gate electrode structure that are alternately stacked in a direction perpendicular to the substrate, a trench penetrating the electrode stack to expose sidewall surfaces of the interlayer insulation layer and the gate electrode structure, a gate dielectric layer disposed along a sidewall surface of the trench, the gate dielectric layer including a ferroelectric portion and a non-ferroelectric portion, and a channel layer disposed to adjacent to the gate dielectric layer. The ferroelectric portion is in contact with the gate electrode structure, and the non-ferroelectric portion is in contact with the interlayer insulation layer.

Abstract: A nonvolatile memory device includes a substrate having an upper surface and a channel structure disposed over the substrate. The channel structure includes at least one channel layer pattern and at least one interlayer insulation layer pattern, which are alternately stacked in a first direction perpendicular to the upper surface, and the channel structure extends in a second direction perpendicular to the first direction. The nonvolatile memory device includes a resistance change layer disposed over the substrate and on at least a portion of one sidewall surface of the channel structure, a gate insulation layer disposed over the substrate and on the resistance change layer, and a plurality of gate line structures disposed over the substrate, each contacting a first surface of the gate insulation layer and disposed to be spaced apart from each other in the second direction.

Abstract: Disclosed is an antenna module for minimizing the occurrence of breakdowns during the manufacturing thereof by adhering heterogeneous material, which adheres heterogeneous material base substrates with adhesive substrates. The disclosed antenna module has a plurality of first radiation patterns formed on the upper surface of a first base substrate, has a plurality of second radiation patterns and a plurality of chipsets formed on the upper surface and the lower surface of a second base substrate disposed below the first base substrate, has a first adhesive substrate interposed between the first base substrate and the second base substrate, wherein the first adhesive substrate has air gap holes formed therein so as to form air gaps between the plurality of first radiation patterns and the plurality of second radiation patterns.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an electrode stack disposed on the substrate, the electrode stack including an interlayer insulation layer and a gate electrode structure that are alternately stacked in a direction perpendicular to the substrate, a trench penetrating the electrode stack to expose sidewall surfaces of the interlayer insulation layer and the gate electrode structure, a gate dielectric layer disposed along a sidewall surface of the trench, the gate dielectric layer including a ferroelectric portion and a non-ferroelectric portion, and a channel layer disposed to adjacent to the gate dielectric layer. The ferroelectric portion is in contact with the gate electrode structure, and the non-ferroelectric portion is in contact with the interlayer insulation layer.

Abstract: An electronic device including a semiconductor memory is provided. The semiconductor memory includes: a substrate having a substantially horizontal upper surface; first to Nth layers (where N is a natural number of two or more) disposed in horizontal layers on the substrate and spaced apart from each other above the substrate in a vertical direction, wherein each of the first to Nth layers includes a plurality of conductive lines; an insulating layer disposed to fill spaces between the conductive lines; a hole having sidewalls that extends in the vertical direction through the conductive lines of the first to Nth layers and the insulating layer therebetween; a variable resistance layer disposed on the sidewalls of the hole; and a conductive pillar disposed to fill the hole in which the variable resistance layer is formed.

Abstract: A nonvolatile memory device according to an embodiment includes a substrate, a channel structure extending in a direction perpendicular to the substrate; a charge storage structure disposed to be in contact with the channel structure; and a cell electrode structure disposed to be in contact with the charge storage structure in a lateral direction, wherein the channel structure comprises a hole conduction layer and an electron conduction layer.

Abstract: A semiconductor device may include: a first electrode; a second electrode; and a multilayer stack that is interposed between the first electrode and the second electrode and includes a seed layer and a high-k dielectric layer, wherein each of the seed layer and the high-k dielectric layer may have a rocksalt crystal structure, and wherein the high-k dielectric layer may exhibit a dielectric constant (k) of fifty (50) or higher.

Abstract: The present disclosure relates to a technical idea for minimizing a signal correction process between users using brain activity-based clustering technology. More specifically, the present disclosure relates to technology for minimizing a signal correction process between users by clustering a brain signal of a measurement subject into a specific clustering model and determining an intention of the measurement subject using an intention determination model learned on the specific clustering model.

Abstract: An electronic device including a semiconductor memory is provided. The semiconductor memory includes: a substrate having a substantially horizontal upper surface; first to Nth layers disposed in horizontal layers on the substrate and spaced apart from each other above the substrate in a vertical direction, wherein each of the first to Nth layers comprises a plurality of conductive lines; an insulating layer disposed to fill spaces between the conductive lines; a hole having sidewalls that extends in the vertical direction through the insulating layer and between the conductive lines to expose, in sidewalls of the hole, conductive lines of the first to Nth layers; a variable resistance layer disposed on sidewalls of the hole; and a conductive pillar disposed to fill the hole in which the variable resistance layer is formed, wherein N is a natural number of two or more.

Abstract: A nonvolatile memory device according to an embodiment includes a substrate, a cell electrode structure disposed on the substrate and including interlayer insulating layers and gate electrode layers that are alternately stacked, a trench penetrating the cell structure on the substrate, a charge storage structure disposed on a sidewall surface of the trench, and a channel structure disposed adjacent to the charge storage structure and extending in a direction parallel to the sidewall surface. The channel structure includes a separate hole conduction layer and an adjacent and separate electron conduction layer. A control channel layer disposed on a control dielectric layer is a portion of the electron conduction layer configured to electrically connect to the channel structure, and to the charge storage structure. A control dielectric layer and a charge barrier layer are discrete but contiguous from the control channel structure to the charge storage structure.

Abstract: Disclosed is an antenna module for minimizing the occurrence of breakdowns during the manufacturing thereof by adhering heterogeneous material, which adheres heterogeneous material base substrates with adhesive substrates. The disclosed antenna module has a plurality of first radiation patterns formed on the upper surface of a first base substrate, has a plurality of second radiation patterns and a plurality of chipsets formed on the upper surface and the lower surface of a second base substrate disposed below the first base substrate, has a first adhesive substrate interposed between the first base substrate and the second base substrate, wherein the first adhesive substrate has air gap holes formed therein so as to form air gaps between the plurality of first radiation patterns and the plurality of second radiation patterns.

Abstract: A nonvolatile memory device according to an embodiment includes a substrate, a resistance change layer disposed on the substrate, a gate electrode layers disposed on the resistance change layer, and a first electrode pattern layer and a second electrode pattern layer that are disposed in the substrate and contact different portions of the resistance change layer. The resistance change layer includes movable oxygen vacancies or movable metal ions.

Abstract: A nonvolatile memory device according to an embodiment includes a substrate, and a gate structure disposed on the substrate and including a hole pattern. The gate structure includes at least one gate electrode layer and at least one interlayer insulation layer which are alternately stacked, and the gate electrode layer protrudes toward a center of the hole pattern relative to the interlayer insulation layer. The nonvolatile memory device includes a first functional layer disposed along a sidewall surface of the gate structure inside the hole pattern, a second functional layer disposed on the first functional layer inside the hole pattern, and a channel layer extending in a direction perpendicular to the substrate inside the hole pattern and disposed to contact a cell portion of the second functional layer. The cell portion of the second functional layer indirectly covers a sidewall surface of the gate electrode layer.