Patents by Inventor Sean Lee
Sean Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11314434Abstract: Disclosed is a distributed storage system and methods for providing real-time localized data access from different storage nodes of the distributed storage system. Providing the localized data access may include tracking access frequencies with which a file is directly accessed from the different storage nodes, storing a source copy of the file at the first storage node in response to the access frequency at the first storage node being greater than the access frequency at the other storage nodes, caching the file at a second storage node, transferring control over the source copy from the first storage node to a third storage node based on a change to the access frequencies, and validating the cached copy of the file at the second storage node against the source copy at the third storage node prior to responding to a request for the file from the second storage node.Type: GrantFiled: May 25, 2021Date of Patent: April 26, 2022Assignee: Open Drives, Inc.Inventors: Scot Gray, Sean Lee
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Publication number: 20220025720Abstract: Techniques for implementing and/or operating a pipe deployment system that includes pipe deployment equipment, in which a pipe drum having spooled thereon a pipe segment is to be loaded on the pipe deployment equipment, and a pulling device to be secured to an unspooled section of the pipe segment. The pulling device includes a device body having a first body arm and a second body arm, in which the device body is to be disposed around the unspooled section of the pipe segment, the first body arm is to be secured to a first cable branch, and the second body arm is to be secured to a second cable branch. The pulling device includes a first pipe grabber secured to the first body arm and a second pipe grabber secured to the second body arm such that the second pipe grabber and the first pipe grabber open towards one another.Type: ApplicationFiled: June 10, 2021Publication date: January 27, 2022Inventors: Christopher Sean Lee, John Paul Leger, Alexander Lee Winn
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Publication number: 20220027545Abstract: An integrated circuit includes a first and second set of gate structures. A center of each of the first set of gate structures is separated from a center of an adjacent gate of the first set of gate structures in a first direction by a first pitch. A center of each of the second set of gate structures is separated from a center of an adjacent gate of the second set of gate structures in the first direction by the first pitch. The first and second set of gate structures extend in a second direction. A gate of the first set of gate structures is aligned in the second direction with a corresponding gate of the second set of gate structures. The gate of the first set of gate structures is separated from the corresponding gate of second set of gate structures in the second direction by a first distance.Type: ApplicationFiled: October 5, 2021Publication date: January 27, 2022Inventors: Yu-Jung CHANG, Chin-Chang HSU, Hsien-Hsin Sean LEE, Wen-Ju YANG
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Patent number: 11216376Abstract: A memory circuit includes a first memory circuit formed of a first die or a set of stacked dies. The memory circuit further includes a second memory circuit formed of a second die, the second memory circuit comprising one or more sets of memory cells of a second type and each set of the memory cells of the second type comprising multiple cache sections. The first die or the set of stacked dies are stacked over the second die, wherein the second die further includes a first plurality of I/O terminals and a second plurality of I/O terminals, the first plurality of I/O terminals being electrically coupled to the first memory circuit, and the second plurality of I/O terminals being electrically isolated from the first memory circuit.Type: GrantFiled: September 30, 2019Date of Patent: January 4, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsien-Hsin Sean Lee, William Wu Shen, Yun-Han Lee
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Publication number: 20210365623Abstract: A semiconductor device includes a first cell. The first cell includes a first functional feature, a first sensitivity region, at least one anchor node, wherein each of the at least one anchor node is different from the first functional feature, and a number of anchor nodes of the at least one anchor node linked to the first functional feature is based on a position of the first functional feature relative to the first sensitivity region. The semiconductor device further includes a second cell abutting the first cell. The second cell includes a second functional feature, wherein the second functional feature satisfies a minimum spacing requirement with respect to the first functional feature.Type: ApplicationFiled: August 5, 2021Publication date: November 25, 2021Inventors: Nien-Yu TSAI, Chin-Chang HSU, Wen-Ju YANG, Hsien-Hsin Sean LEE
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Patent number: 11174967Abstract: Techniques for implementing a pipe transport system. The pipe transport system includes a tow vehicle that moves a pipe trailer on which a pipe segment is loaded, in which the pipe segment includes tubing that defines a pipe bore and a fluid conduit implemented in an annulus of the tubing, and the tow vehicle includes a ripper assembly having a ripper shank. Additionally, the pipe transport system includes a hitch assembly to be secured to the ripper shank of the tow vehicle to enable the tow vehicle to be coupled to a trailer coupler of a tongue assembly implemented on the pipe trailer.Type: GrantFiled: January 27, 2021Date of Patent: November 16, 2021Assignee: Trinity Bay Equipment Holdings, LLCInventors: Christopher Sean Lee, John Paul Leger, Sergio Rodriguez, Alexander Lee Winn
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Patent number: 11163684Abstract: Provided is a predictive read ahead system for dynamically prefetching content from different storage devices. The dynamic prefetching may include receiving requests to read a first set of data of first content from a first storage device at a first rate, and requests to read a first set of data of second content from a second storage device at a different second rate. The dynamic prefetching may include determining different performance for the first storage device than the second storage device, prioritizing an allocation of cache based on a first difference between the first rate and the second rate, and a second difference based on the different performance between the storage devices, and prefetching a first amount of the first content data from the first storage device and a different second amount of the second content data from the second storage device based on the first and second differences.Type: GrantFiled: January 29, 2021Date of Patent: November 2, 2021Assignee: Open Drives, Inc.Inventors: Scot Gray, Sean Lee
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Patent number: 11138361Abstract: An integrated circuit includes a first and second set of gate structures. A center of each of the first set of gate structures is separated from a center of an adjacent gate of the first set of gate structures in a first direction by a first pitch. A center of each of the second set of gate structures is separated from a center of an adjacent gate of the second set of gate structures in the first direction by the first pitch. The first and second set of gate structures extend in a second direction. A gate of the first set of gate structures is aligned in the second direction with a corresponding gate of the second set of gate structures. The gate of the first set of gate structures is separated from the corresponding gate of second set of gate structures in the second direction by a first distance.Type: GrantFiled: November 25, 2019Date of Patent: October 5, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Jung Chang, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Wen-Ju Yang
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Publication number: 20210279398Abstract: A method of generating a plurality of photomasks includes generating a circuit graph. The circuit graph comprises a plurality of vertices and a plurality of edges. Each of the plurality of vertices is representative of one of a plurality of conductive lines. The plurality of edges are representative of a spacing between the conductive lines less than an acceptable minimum distance. Kn+1 graph comprising a first set of vertices selected from the plurality of vertices connected in series by a first set of edges selected from the plurality of edges and having at least one non-series edge connection between a first vertex and a second vertex selected from the first set of vertices is reduced by merging a third vertex into a fourth vertex selected from the first set of the plurality of vertices. An n-pattern conflict check is performed and the photomasks generated based on the result.Type: ApplicationFiled: May 21, 2021Publication date: September 9, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Nien-Yu TSAI, Chin-Chang HSU, Wen-Ju Preet YANG, Hsien-Hsin Sean Lee
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Publication number: 20210270389Abstract: Techniques for implementing a pipe transport system. The pipe transport system includes a tow vehicle that moves a pipe trailer on which a pipe segment is loaded, in which the pipe segment includes tubing that defines a pipe bore and a fluid conduit implemented in an annulus of the tubing, and the tow vehicle includes a ripper assembly having a ripper shank. Additionally, the pipe transport system includes a hitch assembly to be secured to the ripper shank of the tow vehicle to enable the tow vehicle to be coupled to a trailer coupler of a tongue assembly implemented on the pipe trailer.Type: ApplicationFiled: January 27, 2021Publication date: September 2, 2021Inventors: Christopher Sean Lee, John Paul Leger, Sergio Rodriguez, Alexander Lee Winn
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Patent number: 11106852Abstract: A semiconductor device includes a first cell. The first cell includes a first functional feature, a first sensitivity region, at least one anchor node, wherein each of the at least one anchor node is different from the first functional feature, and a number of anchor nodes of the at least one anchor node linked to the first functional feature is based on a position of the first functional feature relative to the first sensitivity region. The semiconductor device further includes a second cell abutting the first cell. The second cell includes a second functional feature, wherein the second functional feature satisfies a minimum spacing requirement with respect to the first functional feature.Type: GrantFiled: June 16, 2020Date of Patent: August 31, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Nien-Yu Tsai, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Wen-Ju Yang
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Patent number: 11080561Abstract: Methods, systems, and devices for training and verification of learning models are described. A device may capture a camera frame including a road feature of a physical environment, determine a first classification and a first localization of the road feature based on positioning information of the road feature from a high-definition map and positioning information of the device from a positioning engine. The device may analyze a learning model by comparing one or more of the first classification of the road feature or the first localization of the road feature in the camera frame to one or more of a second classification or a second localization of the road feature determined by the learning model. The device may then determine a loss comparison value and adapt the learning model according to the loss comparison value.Type: GrantFiled: May 30, 2019Date of Patent: August 3, 2021Assignee: QUALCOMM IncorporatedInventors: Arunandan Sharma, Sean Lee
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Patent number: 11062075Abstract: A method of manufacturing an integrated circuit includes generating a layout design of the integrated circuit, manufacturing the integrated circuit based on the layout design, and removing a portion of a gate structure of a set of gate structures thereby forming a first and a second gate structure. Generating the layout design includes placing a set of gate layout patterns and a cut feature layout pattern on the first layout level. The cut feature layout pattern extends in a first direction, overlaps the set of gate layout patterns and identifies a location of the portion of the gate structure of the set of gate structures. The set of gate layout patterns correspond to fabricating a set of gate structures. The set of gate layout patterns extending in a second direction and overlapping a set of gridlines that extend in the second direction.Type: GrantFiled: November 25, 2019Date of Patent: July 13, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Jung Chang, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Wen-Ju Yang
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Publication number: 20210191871Abstract: A device (e.g., an application-specific integrated circuit chip) includes a memory module processing unit and an interface. The memory module processing unit is configured to receive an instruction to obtain values stored in one or more memory components and process the obtained values to return a processed result. The memory module processing unit is also configured to store the obtained values in a cache based on one or more criteria. The memory module processing unit is configured to be included on a computer memory module configured to be installed in a computer system. The interface is configured to communicate with the one or more memory components included on the computer memory module.Type: ApplicationFiled: February 6, 2020Publication date: June 24, 2021Inventors: Liu Ke, Xuan Zhang, Udit Gupta, Carole-Jean Wu, Mark David Hempstead, Brandon Reagen, Hsien-Hsin Sean Lee
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Patent number: 11017148Abstract: A method of generating a plurality of photomasks includes generating a circuit graph. The circuit graph comprises a plurality of vertices and a plurality of edges. Each of the plurality of vertices is representative of one of a plurality of conductive lines. The plurality of edges are representative of a spacing between the conductive lines less than an acceptable minimum distance. Kn+1 graph comprising a first set of vertices selected from the plurality of vertices connected in series by a first set of edges selected from the plurality of edges and having at least one non-series edge connection between a first vertex and a second vertex selected from the first set of vertices is reduced by merging a third vertex into a fourth vertex selected from the first set of the plurality of vertices. An n-pattern conflict check is performed and the photomasks generated based on the result.Type: GrantFiled: September 30, 2019Date of Patent: May 25, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Nien-Yu Tsai, Chin-Chang Hsu, Wen-Ju Preet Yang, Hsien-Hsin Sean Lee
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Patent number: 11016688Abstract: Disclosed is a distributed storage system and methods for providing real-time localized data access from different storage nodes of the distributed storage system. Providing the localized data access may include tracking access frequencies with which a file is directly accessed from the different storage nodes, storing a source copy of the file at the first storage node in response to the access frequency at the first storage node being greater than the access frequency at the other storage nodes, caching the file at a second storage node, transferring control over the source copy from the first storage node to a third storage node based on a change to the access frequencies, and validating the cached copy of the file at the second storage node against the source copy at the third storage node prior to responding to a request for the file from the second storage node.Type: GrantFiled: January 6, 2021Date of Patent: May 25, 2021Assignee: Open Drives LLCInventors: Scot Gray, Sean Lee
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Patent number: 11010100Abstract: An asynchronous storage system may perform asynchronous writing of data from different sets of received non-consecutive synchronous write requests based on a dynamic write threshold that varies according to parameters of the storage device and/or synchronous write request patterns. The asynchronous writing may include coalescing data from a set of non-consecutive write requests in a plurality of received write requests that contain different data for a particular file, issuing a single asynchronous write request with the data that is coalesced from each write request of the set of non-consecutive write requests to the storage device instead of each write request of the set of non-consecutive write requests, and writing the data that is coalesced from each write request of the set of non-consecutive write requests to the storage device with a single write operation that is executed in response to the single asynchronous write request.Type: GrantFiled: September 29, 2020Date of Patent: May 18, 2021Assignee: Open Drives LLCInventors: Scot Gray, Sean Lee
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Patent number: 10983710Abstract: An uneven distributed storage across a mesh fabric storage system may include receiving storage operations from one or more client devices and/or applications contemporaneously with receiving availability messaging from a set of multiple storage devices that may be of the same or different types. One or more of the storage operations may be assigned to a storage device that has signaled its readiness to perform the one or more storage operations via an issued availability message. Each storage device may thereby perform a subset of the collective set of storage operations with the uneven distribution allocating load that is directly commensurate with the performance of each storage device. Stored data may be moved between storage devices using a similar availability-driven methodology so as to reallocate capacity usage while still providing the fastest storage performance associated with all storage devices writing the data as it is generated.Type: GrantFiled: November 20, 2020Date of Patent: April 20, 2021Assignee: Open Drives LLCInventors: Scot Gray, Sean Lee
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Publication number: 20210049027Abstract: Systems and methods for automated monitoring and troubleshooting of unknown dependencies in a virtual infrastructure are disclosed. In particular, systems and methods disclosed herein enable automation of processes for detecting network errors for virtual machines residing on virtual infrastructures and retrieving network addresses and physical ports associated with the errors. Aspects of the technology use the IEEE MAC address of the virtual instance to triage the L2 connectivity to determine the physical port to which the virtual instance is attached and then automatically report the port to the network operator. The system also provides a method of saving virtual instances that are in a faulty state so that instances can be investigated further by automated monitoring tools.Type: ApplicationFiled: August 14, 2019Publication date: February 18, 2021Inventors: Stephan Lagerholm, John Karlo Garcia, Vincent Chong, Sean Lee
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Patent number: 10922231Abstract: Provided is a predictive read ahead system for dynamically prefetching content from different storage devices. The dynamic prefetching may include receiving requests to read a first set of data of first content from a first storage device at a first rate, and requests to read a first set of data of second content from a second storage device at a different second rate. The dynamic prefetching may include determining different performance for the first storage device than the second storage device, prioritizing an allocation of cache based on a first difference between the first rate and the second rate, and a second difference based on the different performance between the storage devices, and prefetching a first amount of the first content data from the first storage device and a different second amount of the second content data from the second storage device based on the first and second differences.Type: GrantFiled: October 22, 2020Date of Patent: February 16, 2021Assignee: Open Drives LLCInventors: Scot Gray, Sean Lee