Abstract: An engagement value processing system is provided which can simultaneously acquire biological information such as a pulse in addition to an engagement value by using only video data obtained from an imaging apparatus. In an image data stream outputted by the imaging apparatus, feature data indicating features of a face is generated by a feature extraction unit. A face direction vector and a line-of-sight direction vector for calculating an engagement value of a user for a content are calculated from the feature data. On the other hand, the feature data can also be used to cut out partial image data for detecting a pulse and estimate the emotion of the user. Therefore, the engagement value for the content, the pulse, and the emotion of the user viewing the content can be simultaneously acquired simply by capturing the user with the imaging apparatus.

Abstract: A design support apparatus is for designing a logic circuit. The apparatus includes: a display device; an behavioral description storage section that stores behavioral description that describes functions of the logic circuit; a loop statement detection section that detects a loop statement that describes a repeat operation from the behavioral description; a loop statement analysis section that generates structure information that describes a structure of the loop statement by analyzing the loop statement detected by the loop statement detection section; and a display control section that controls the display device to display the structure information. The display control section controls the display device to display operations in a loop body defined by the loop statement in a time series manner.

Abstract: A computer aided design technique for clock gated logic circuits effective to reduce the electric power consumption is disclosed.

Abstract: A circuit design support apparatus partially converts a description of a circuit model to simulate the circuit operation. A register signal replacement section replaces a register signal with a variable in a process related with the register signal of the description and inserts a declaration of the variable in the process instead of a declaration of the register signal in the description. A clock signal simplification section replaces a clock signal with a variable in a clock signal reference process of the description and unifies a clock signal update process to the clock signal reference process in the description.

Abstract: A computer aided design technique for clock gated logic circuits effective to reduce the electric power consumption is disclosed.

Abstract: A computer aided design technique for clock gated logic circuits effective to reduce the electric power consumption is disclosed.

Abstract: In a logic circuit diagram processing apparatus, when an original signal name or an original signal line is designated, all the signal lines associated with the designated signal (i.e. signal lines through which the designated signal is passed; logic elements to which the designated signal lines are connected; signal lines connected to the logic elements to which already-traced signal lines are connected, etc.) are displayed in color or colors, for instance, visually different from that of other signal lines, for providing an easy operator's visual confirmation or visual check of a logic circuit.