Abstract: A ship monitoring system makes it easier to grasp a heading of another ship, and includes a first data generating part, a second data generating part, and processing circuitry. The first data generating part generates first ship data indicative of a position and a velocity of a first ship. The second data generating part generates second ship data indicative of a position and a velocity of a second ship. The processing circuitry calculates a risk value indicative of a risk of the first ship and the second ship colliding each other, for each point on an estimated course of the second ship, based on the first ship data and the second ship data, when assuming that the first ship changes the course and reaches the point. The processing circuitry displays a risk area indicative of a heading of the second ship at the point where the risk value is more than a threshold.

Abstract: A first object of the present invention is to provide a surface-modified inorganic nitride having excellent dispersibility. Furthermore, a second object of the present invention is to provide a composition, a thermally conductive material, and a device with a thermally conductive layer which contain the surface-modified inorganic nitride. The surface-modified inorganic nitride of the present invention includes an inorganic nitride, and a compound which is represented by General Formula (I) and is adsorbed onto a surface of the inorganic nitride. In General Formula (1), n represents an integer of 3 or greater. X represents an aromatic hydrocarbon ring group or an aromatic heterocyclic group. Y represents a single bond, —O—, —CO—, —CO—O—, —O—CO—, —S—, —CS—, —NRA—, —N?N—, or a divalent unsaturated hydrocarbon group. RA represents a hydrogen atom or an alkyl group. R1 and R2 each independently represent a substituent.

Abstract: An object of the present invention is to provide a surface-modified inorganic nitride having excellent dispersibility. Furthermore, another object of the present invention is to provide a composition, a thermally conductive material, and a device with a thermally conductive layer which contain the surface-modified inorganic nitride. The surface-modified inorganic nitride of the present invention includes an inorganic nitride, and a compound which is represented by General Formula (I) and is adsorbed onto a surface of the inorganic nitride.

Abstract: A semiconductor module circuit structure, including an insulating circuit substrate having an insulating plate, and a circuit pattern formed on a top face of the insulating plate, and a semiconductor element disposed on a top face of the circuit pattern. The circuit pattern includes a first straight part extending in a first direction, a second straight part extending in a second direction different from the first direction, and a corner part connecting the first and second straight parts. A wiring member is formed on a top surface of the first straight part along the first direction, the wiring member being formed off-center at the first straight part to be closer to an outer periphery of the circuit pattern.

Abstract: A semiconductor device includes a semiconductor chip, a bonding member, and a planar laminated substrate having the semiconductor chip bonded to a front surface thereof via the bonding member. The laminated substrate includes a planar ceramic board, a high-potential metal layer, a low-potential metal layer, an intermediate layer. The planar ceramic board contains a plurality of ceramic particles. The high-potential metal layer contains copper and is bonded to a first main surface of the ceramic board. The low-potential metal layer contains copper, is bonded to a second main surface of the ceramic board, and has a potential lower than a potential of the first main surface of the high-potential metal layer. The intermediate layer is provided between the second main surface and the low-potential metal layer and includes a first oxide that contains at least either magnesium or manganese.

Abstract: A semiconductor device, including a circuit pattern, a contact part and an external connection terminal. The contact part has a cylindrical through-hole and first and second opening ends opposite to each other, the second opening end being joined to the circuit pattern. The external connection terminal has a prismatic main body portion and first and second end portions, the second end portion being inserted into the through-hole from the first opening end of the contact part. The main body portion of the external connection terminal has an insertion prevented portion formed thereon. The contact part includes an insertion preventing portion formed on an inner circumferential surface of the through-hole, the insertion preventing portion being so positioned as to be substantially downstream, with respect to an insertion direction of the external connection terminal, from the main body portion of the external connection terminal inserted into the through-hole.

Abstract: A semiconductor device, including a circuit pattern, a contact part and an external connection terminal. The contact part has a cylindrical through-hole and first and second opening ends opposite to each other, the second opening end being joined to the circuit pattern. The external connection terminal has a prismatic main body portion and first and second end portions, the second end portion being inserted into the through-hole from the first opening end of the contact part. The main body portion of the external connection terminal has an insertion prevented portion formed thereon. The contact part includes an insertion preventing portion formed on an inner circumferential surface of the through-hole, the insertion preventing portion being so positioned as to be substantially downstream, with respect to an insertion direction of the external connection terminal, from the main body portion of the external connection terminal inserted into the through-hole.

Abstract: A semiconductor device, including a first conductive portion including a first conducting region and a first wiring region communicating with the first conducting region via a first communicating portion, a second conductive portion including a second conducting region and a second wiring region that communicates with the second conducting region via a second communicating portion and that faces the first wiring region with a prescribed space therebetween, and a wiring member electrically connecting the first wiring region and the second wiring region in a wiring direction. The first communicating portion and the second communicating portion are separate from each other when viewed from the wiring direction.

Abstract: A semiconductor module circuit structure, including an insulating circuit substrate having an insulating plate, and a circuit pattern formed on a top face of the insulating plate, and a semiconductor element disposed on a top face of the circuit pattern. The circuit pattern includes a first straight part extending in a first direction, a second straight part extending in a second direction different from the first direction, and a corner part connecting the first and second straight parts. A wiring member is formed on a top surface of the first straight part along the first direction, the wiring member being formed off-center at the first straight part to be closer to an outer periphery of the circuit pattern.

Abstract: A semiconductor includes a semiconductor element, a connecting terminal electrically connected to the semiconductor element, and a case including an opening space for housing the semiconductor element, a frame which surrounds the opening space and in which the connecting terminal is partially embedded, and a terminal arrangement portion protruding from the frame towards the opening space. The connecting terminal includes an internal terminal portion that extends towards the opening space with respect to the frame, the internal terminal portion having a front surface that is electrically connected to the semiconductor element and exposed to the opening space, and a rear surface that is fixed to the terminal arrangement portion.

Abstract: A semiconductor device, including a first conductive portion including a first conducting region and a first wiring region communicating with the first conducting region via a first communicating portion, a second conductive portion including a second conducting region and a second wiring region that communicates with the second conducting region via a second communicating portion and that faces the first wiring region with a prescribed space therebetween, and a wiring member electrically connecting the first wiring region and the second wiring region in a wiring direction. The first communicating portion and the second communicating portion are separate from each other when viewed from the wiring direction.

Abstract: In a semiconductor device, the marginal edge of a resist member on the side closer to a substrate is between first and third positions on a metal base plate. The third position is directly under an outer side surface of a metal plate. The first position is outside the third position and is away from a second position on the metal base plate directly under an outer side surface of the electrical insulating board, by a distance calculated by dividing “the height from a principal surface of the metal base plate to the front surface of the electrical insulating board” by “the tangent of the contact angle of solder created by the marginal edge stopping solder flow”. This makes it possible to ensure sufficient insulation distances between conductive patterns and the solder and to reduce creepage distances of the conductive patterns over the electrical insulating board.

Abstract: A semiconductor includes a semiconductor element, a connecting terminal electrically connected to the semiconductor element, and a case including an opening space for housing the semiconductor element, a frame which surrounds the opening space and in which the connecting terminal is partially embedded, and a terminal arrangement portion protruding from the frame towards the opening space. The connecting terminal includes an internal terminal portion that extends towards the opening space with respect to the frame, the internal terminal portion having a front surface that is electrically connected to the semiconductor element and exposed to the opening space, and a rear surface that is fixed to the terminal arrangement portion.

Abstract: In a semiconductor device, the marginal edge of a resist member on the side closer to a substrate is between first and third positions on a metal base plate. The third position is directly under an outer side surface of a metal plate. The first position is outside the third position and is away from a second position on the metal base plate directly under an outer side surface of the electrical insulating board, by a distance calculated by dividing “the height from a principal surface of the metal base plate to the front surface of the electrical insulating board” by “the tangent of the contact angle of solder created by the marginal edge stopping solder flow”. This makes it possible to ensure sufficient insulation distances between conductive patterns and the solder and to reduce creepage distances of the conductive patterns over the electrical insulating board.

Abstract: A CVD device including: a chamber containing a substrate having a SiC-film formation surface; a heating mechanism for heating the substrate from a direction opposite the film formation surface; a third supply space (231) for supplying a third raw-material gas containing carbon in a direction (X) toward the substrate from the lateral side of the substrate; a second supply space (221) for supplying a second raw-material gas containing silicon in the direction (X) from the lateral side of the substrate toward the side farther than the third raw-material gas when viewed from the film formation surface; and a blocking gas supply section for supplying a blocking gas for suppressing the upward movement of the third raw-material gas and the second raw-material gas in a second direction from the side facing the film formation surface toward the film formation surface.

Abstract: A CVD device equipped with a container chamber (100) having an interior space (100a), and containing a substrate in a manner such that the film formation surface thereof faces upward from the bottom side (fifth region (A5)) of the interior space (100a). Silane gas and propane gas are supplied to the interior space (100a). A stainless-steel ceiling (120) is provided on the top of the interior space (100a). The ceiling (120) is provided with first through third partition members (171-173) attached thereto which comprise stainless steel, are positioned so as to extend in the -Z-direction and transect the X-direction, and divide the top side of the interior space (100a) into first through fourth regions (A1-A4). The substrate positioned inside the interior space (100a) is heated to 1600° C. The first through third partition members (171-173) and the ceiling (120) are cooled to 300° C. or lower by a cooling mechanism.

Abstract: [Object] To provide a deposition method and a deposition apparatus, which are capable of cleaning a surface of a silicon substrate and causing a single crystal film having excellent crystallinity to grow on the surface. [Solving Means] A deposition method according to an embodiment of the present invention includes a process of etching a natural oxide film formed on a surface of a silicon substrate. The surface of the silicon substrate is cleaned. A film is caused to grow on the cleaned surface of the silicon substrate, the film including at least one of silicon and germanium.

Abstract: A processing gas is introduced to remove an oxide film on the surface of a silicon substrate 5. F radicals are allowed to act on the surface of the silicon substrate to etch a silicon layer. Then, NH3 gas, N2 gas and NF3 gas are introduced, allowing NHxFy to act on the oxidized surface of the silicon substrate 5, thereby forming (NH4)2SiF6. The resulting (NH4)2SiF6 is sublimated to remove by-products (SiOF, SiOH) on the surface of the silicon substrate 5.

Abstract: A vacuum processing apparatus is provided with: a vacuum processing tank; a first gas introduction section that is constructed such that a first processing gas in a radical state is introduced into the vacuum processing tank and is guided to a semiconductor wafer; and a second gas introduction section that is constructed such that a second processing gas that reacts with the first processing gas is introduced into the vacuum processing tank and is guided to the semiconductor wafer. The second gas introduction section has two shower nozzles provided at positions on either side of an introduction pipe provided for the first gas introduction section. According to this vacuum processing apparatus, high speed processing of a number of processing objects can be achieved. Moreover, the in-plane uniformity of the processing objects after processing can be ensured.

Abstract: Native oxide film on a semiconductor silicon wafer(s) is dry etched at a temperature of 50° C. or less. Hydrogen treatment is then carried out a temperature of 100° C. or more to bond the dangling bonds with hydrogen. A jig 9 that has been used is again used for loading new semiconductor silicon wafer(s) 10. The wafer(s) on the jig 9 is subjected to removal of a native oxide film and then hydrogen bonding. The resultant heat remains in jig and makes it difficult to maintain the wafers to temperature appropriate to removal of a native oxide film. After treatment of hydrogen bonding, inert gas having temperature of from 0 to ?30° C. is injected into reaction vessel 5 and/or treatment preparing vessel 21, in which a native oxide film has been removed.