Patents by Inventor Seiichi Watanabe

Seiichi Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9034148
    Abstract: A method to inexpensively and efficiently produce conductive materials on the surface of which a nano-level fine structure is formed includes surface modification including immersing a stable anode electrode and a workpiece as a cathode electrode, the workpiece including a conductive material with a work surface, in an electrolytic solution, then applying a voltage not less than a first voltage and less than a second voltage between the stable anode electrode and the workpiece as the cathode electrode immersed in the electrolytic solution, thereby modifying the work surface, the first voltage being a voltage corresponding to a current value that is ½ of the sum of a first maximum current value appearing first in a positive voltage region and a first minimum current value appearing first in the positive voltage region with respect to voltage-current characteristics of a surface modification treatment system, the second voltage exhibiting a complete-state plasma.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: May 19, 2015
    Assignee: JFE STEEL CORPORATION
    Inventors: Masayasu Nagoshi, Kaoru Sato, Seiichi Watanabe, Souki Yoshida
  • Patent number: 8968839
    Abstract: There is provided a method for producing a surface-treated metallic material, by use of which a metallic material having a stable and excellent sliding characteristic can be produced with a low environmental load without covering the metallic material surface with an oxide film. The method for producing a surface-treated metallic material includes immersing an anode and a cathode in an electrolyte solution, placing a metallic material used as a material to be treated above the surface of the electrolyte solution, and applying a voltage between the anode and the cathode to treat the metallic material surface, the voltage being equal to or higher than a voltage for causing a complete plasma state.
    Type: Grant
    Filed: November 24, 2011
    Date of Patent: March 3, 2015
    Assignee: JFE Steel Corporation
    Inventors: Masayasu Nagoshi, Kaoru Sato, Seiichi Watanabe, Souki Yoshida
  • Patent number: 8964314
    Abstract: There are provided a lens that is molded with high accuracy and a method of molding the lens. The lens has an optical axis and includes a pair of optical functional surfaces on front and rear surfaces thereof. The lens includes an optical functional portion that includes the pair of optical functional surfaces, an edge portion that is provided at an outer periphery of the optical functional portion, and a connecting portion that is provided between the optical functional portion and the edge portion, connects the optical functional portion with the edge portion, and is thinner than the edge portion in a direction of the optical axis.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: February 24, 2015
    Assignee: FUJIFILM Corporation
    Inventors: Kazumi Koike, Seiichi Watanabe, Takayuki Fujiwara
  • Publication number: 20150050378
    Abstract: The invention provides a lens forming apparatus that can suppress generation of burrs even if gaps between outer walls of an upper die and a lower die and an inner wall of a trunk die is made wide. A lens forming apparatus 11 according to the present invention includes a trunk die 12 having a through-hole 17 therein; first and second dies 13 and 14 that are fitted into the through-hole 17 from both ends thereof, respectively, and have pressing surfaces 20 and 30 for sandwiching and pressing a forming material 24; and induction-heating coils 15 and 16 that heat the first and second dies 13 and 14 to a temperature equal to or higher than a glass transition point, in a state where the trunk die 12 is not heated and the temperature thereof is set to a temperature equal to or lower than the glass transition point.
    Type: Application
    Filed: September 11, 2014
    Publication date: February 19, 2015
    Inventors: Takayuki FUJIWARA, Seiichi WATANABE
  • Publication number: 20140346692
    Abstract: Disclosed is a method of manufacturing an optical element capable of increasing surface accuracy of an optical surface of an optical element with a plastic lens portion. A cavity which is formed when a pair of molds are closed has a compression molding space and an annular injection molding space, and the method includes a compression molding step of casting a compression molding material into the compression molding space of the molds and an injection molding step of injecting an injection molding material into the injection molding space in a state where the molds are closed and forming an injection molded portion at the outer circumferential edge of the compression molded compression molding material. In the injection molding step, before the compression molding material reaches a temperature lower than the glass transition temperature, the injection of the injection molding material starts.
    Type: Application
    Filed: August 13, 2014
    Publication date: November 27, 2014
    Inventors: Seiichi WATANABE, Kazumi KOIKE, Takayuki FUJIWARA
  • Publication number: 20140347752
    Abstract: In a composite molded lens, a press-formed lens body is integral with an injection-molded lens frame. The lens body has a lens portion and a flange portion surrounding the lens portion. Eight projections are radially formed on a top surface of the flange portion. The height of the projection increases toward an outer peripheral edge side of the flange portion. A recess is formed on an outer peripheral edge face of the flange portion and located at a position on a line extending from the projection. The recess increases torsional resilience of a joint surface between the lens body and the lens frame and strengthens bonding force there between.
    Type: Application
    Filed: August 14, 2014
    Publication date: November 27, 2014
    Inventors: KAZUMI KOIKE, SEIICHI WATANABE, TAKAYUKI FUJIWARA, YASUHITO HIRAKI
  • Publication number: 20140319707
    Abstract: In order to produce high-quality optical elements stably at all times without the flow of molten resin inside an injection molding cavity being hindered by the protrusion of the outer peripheral edge of a lens after compression molding, a cavity formed when a pair of molds for molding is closed is provided with: an optical-function-part molding cavity (27); an annular connection-part molding cavity (28) connected to the outer peripheral edge of the optical-function-part molding cavity; and an edge-part molding cavity (29) connected to the outer peripheral edge of the connection-part molding cavity. In a compression molding step, a protrusion part is formed by making a portion of a compression molding material bulge out from the connection-part molding cavity into the edge-part molding cavity (29). In an injection molding step, the molds are filled by injecting an injection molding material into the edge-part molding cavity (29).
    Type: Application
    Filed: July 15, 2014
    Publication date: October 30, 2014
    Inventors: Seiichi WATANABE, Kazumi KOIKE
  • Publication number: 20140240845
    Abstract: There are provided a lens that is molded with high accuracy and a method of molding the lens. The lens has an optical axis and includes a pair of optical functional surfaces on front and rear surfaces thereof. The lens includes an optical functional portion that includes the pair of optical functional surfaces, an edge portion that is provided at an outer periphery of the optical functional portion, and a connecting portion that is provided between the optical functional portion and the edge portion, connects the optical functional portion with the edge portion, and is thinner than the edge portion in a direction of the optical axis.
    Type: Application
    Filed: March 28, 2014
    Publication date: August 28, 2014
    Applicant: FUJIFILM Corporation
    Inventors: Kazumi KOIKE, Seiichi WATANABE, Takayuki FUJIWARA
  • Publication number: 20140220489
    Abstract: Long-period roughness in patterned resist is reduced in a manufacturing process of a sample such as a semiconductor device. A method for processing a sample to be processed, with patterned resist, in a sample processing apparatus includes: disposing the sample to be processed, with the patterned resist on the stage in the processing chamber; supplying silicon tetrachloride (SiCl4) or hydrobromide (HBr) into the processing chamber as processing gas; holding the pressure of the processing chamber in the range of 1 Pa to 10 KPa; exciting the processing gas by irradiating the vacuum ultraviolet light having a wavelength of 200 nm or less to the processing gas; reacting an element contained in the excited processing gas with the pattern resist of the sample, and curing the resist.
    Type: Application
    Filed: March 11, 2013
    Publication date: August 7, 2014
    Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Yutaka KOZUMA, Hiroaki OIZUMI, Naoki YASUI, Seiichi WATANABE
  • Publication number: 20140210945
    Abstract: Provided is a stereoscopic endoscope device enabling precise observation based on a 3D-image and observation of a wide field of view range based on a 2D-image and enabling the change of the field of view range according to the situation with a simple structure without increasing the size of an imaging unit or complicating the configuration. An imaging unit 50 disposed in a distal portion of a stereoscopic endoscope includes a pair of left and right imaging units 50L, 50R that capture a parallax image of a subject of a part of interest. The left and the right imaging unit 50L, 50R include a left and a right imaging optical system 60L, 60R, which form a subject image, and reflecting mirrors 302L and 302R located on the rear end sides of the left and the right imaging optical system 60L, 60R, respectively.
    Type: Application
    Filed: January 3, 2014
    Publication date: July 31, 2014
    Applicant: FUJIFILM Corporation
    Inventors: Masaaki MORIZUMI, Shuji ONO, Seiichi WATANABE
  • Patent number: 8790549
    Abstract: An object of the present invention is to provide an electronic component using a Cu-based conductive material that can suppress oxidization even in a heat treatment in an oxidizing atmosphere and that can suppress an increase in an electrical resistance. In an electronic component having an electrode or a wiring, a ternary alloy made from three elements consisting of Cu, Al, and Co is used as a Cu-based wiring material that can prevent oxidization of the electrode or the wiring. Specifically, part or the whole of the electrode or the wiring has a chemical composition in which an Al content is 10 at % to 25 at %, a Co content is 5 at % to 20 at %, and the balance is composed of Cu and unavoidable impurities, and the chemical composition represents a ternary alloy in which two phases of a Cu solid solution formed by Al and Co being dissolved into Cu and a CoAl intermetallic compound coexist together.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: July 29, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kato, Takashi Naito, Hiroki Yamamoto, Takuya Aoyagi, Seiichi Watanabe, Seiji Miura, Norihito Sakaguchi, Kazuki Aoshima, Kenji Ohkubo
  • Publication number: 20140144782
    Abstract: A method to inexpensively and efficiently produce conductive materials on the surface of which a nano-level fine structure is formed includes surface modification including immersing a stable anode electrode and a workpiece as a cathode electrode, the workpiece including a conductive material with a work surface, in an electrolytic solution, then applying a voltage not less than a first voltage and less than a second voltage between the stable anode electrode and the workpiece as the cathode electrode immersed in the electrolytic solution, thereby modifying the work surface, the first voltage being a voltage corresponding to a current value that is ½ of the sum of a first maximum current value appearing first in a positive voltage region and a first minimum current value appearing first in the positive voltage region with respect to voltage-current characteristics of a surface modification treatment system, the second voltage exhibiting a complete-state plasma.
    Type: Application
    Filed: August 26, 2011
    Publication date: May 29, 2014
    Applicant: JFE STEEL CORPORATION
    Inventors: Masayasu Nagoshi, Kaoru Sato, Seiichi Watanabe, Souki Yoshida
  • Patent number: 8735299
    Abstract: There is provided a semiconductor device manufacturing method for forming a step-shaped structure in a substrate by etching the substrate having thereon a multilayer film and a photoresist film on the multilayer film and serving as an etching mask. The multilayer film is formed by alternately layering a first film having a first permittivity and a second film having a second permittivity different from the first permittivity. The method includes a first process for plasma-etching the first film by using the photoresist film as a mask; a second process for exposing the photoresist film to hydrogen-containing plasma; a third process for trimming the photoresist film; and a fourth process for etching the second film by using the trimmed photoresist film and the plasma-etched first film as a mask. The step-shaped structure is formed in the multilayer film by repeatedly performing the first process to the fourth process in this sequence.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: May 27, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Seiichi Watanabe, Manabu Sato, Kazuki Narishige, Takanori Sato, Takayuki Katsunuma
  • Publication number: 20130243975
    Abstract: There is provided a method for producing a surface-treated metallic material, by use of which a metallic material having a stable and excellent sliding characteristic can be produced with a low environmental load without covering the metallic material surface with an oxide film. The method for producing a surface-treated metallic material includes immersing an anode and a cathode in an electrolyte solution, placing a metallic material used as a material to be treated above the surface of the electrolyte solution, and applying a voltage between the anode and the cathode to treat the metallic material surface, the voltage being equal to or higher than a voltage for causing a complete plasma state.
    Type: Application
    Filed: November 24, 2011
    Publication date: September 19, 2013
    Applicant: JFE STEEL CORPORATION
    Inventors: Masayasu Nagoshi, Kaoru Sato, Seiichi Watanabe, Souki Yoshida
  • Patent number: 8497213
    Abstract: The invention provides a method for subjecting laminated thin films disposed below a photoresist mask pattern to plasma processing, wherein the roughness on the side walls of the formed pattern is reduced, and the LER and LWR are reduced. When etching a material to be processed to form a gate electrode including thin films such as a gate insulating film 205, a conducting layer 204, a mask layer 203 and an antireflection film 202 laminated on a semiconductor substrate 206 and a photoresist mask pattern 201 disposed on the antireflection film, prior to etching the mask pattern 201, plasma is generated from nitrogen gas or a mixed gas including nitrogen gas and deposition gas to subject the mask pattern 201 to a plasma curing process so as to reduce the roughness on the surface and side walls of the mask pattern 201, and then the laminated thin films 202, 203 and 204 disposed below the mask pattern 201 are subjected to a plasma etching process.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: July 30, 2013
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Naoki Yasui, Seiichi Watanabe
  • Patent number: 8343253
    Abstract: A method for producing conductor fine particles in which the advantages of conventional vapor phase method and liquid phase method are utilized while eliminating the drawbacks of both methods remarkably. Furthermore, definite guidelines and measure for improvement are given to the greatest problems common to the vapor phase method and liquid phase method, i.e., enhancement in quality of the unit fine particle and a fine particle production method controllably temporarily and regionally. The method for producing conductor fine particles comprises a step for applying a voltage to a pair of electrode consisting of a positive electrode and a negative electrode arranged in conductive liquid and generating plasma in the vicinity of the negative electrode, and a step for producing conductor fine particles by melting the metal material of the negative electrode and then re-solidifying.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: January 1, 2013
    Assignee: Kankyou Engineering Co., Ltd.
    Inventors: Seiichi Watanabe, Yu Toriyabe, Shigeo Yatsu, Tamaki Shibayama, Tadahiko Mizuno
  • Publication number: 20120285733
    Abstract: An object of the present invention is to provide an electronic component using a Cu-based conductive material that can suppress oxidization even in a heat treatment in an oxidizing atmosphere and that can suppress an increase in an electrical resistance. In an electronic component having an electrode or a wiring, a ternary alloy made from three elements consisting of Cu, Al, and Co is used as a Cu-based wiring material that can prevent oxidization of the electrode or the wiring. Specifically, part or the whole of the electrode or the wiring has a chemical composition in which an Al content is 10 at % to 25 at %, a Co content is 5 at % to 20 at %, and the balance is composed of Cu and unavoidable impurities, and the chemical composition represents a ternary alloy in which two phases of a Cu solid solution formed by Al and Co being dissolved into Cu and a CoAl intermetallic compound coexist together.
    Type: Application
    Filed: April 8, 2010
    Publication date: November 15, 2012
    Inventors: Takahiko Kato, Takashi Naito, Hiroki Yamamoto, Takuya Aoyagi, Seiichi Watanabe, Seiji Miura, Norihito Sakaguchi, Kazuki Aoshima, Kenji Ohkubo
  • Publication number: 20120244579
    Abstract: A monosaccharide production method of producing a monosaccharide from a lignocellulosic raw material comprising: obtaining a saccharified liquid obtained from a lignocellulosic raw material and a saccharification enzyme; recovering the saccharification enzyme from the saccharified liquid by allowing the saccharification enzyme to be adsorbed on the lignocellulosic raw material; and saccharifying the lignocellulosic raw material using the recovered saccharification enzyme.
    Type: Application
    Filed: November 25, 2010
    Publication date: September 27, 2012
    Inventors: Kazuya Matsumoto, Masami Osabe, Ryota Fujii, Seiichi Watanabe, Ayako Endo, Sakurako Kimura, Tadashi Araki, Akira Nakayama
  • Publication number: 20120228261
    Abstract: There is provided a VUV light processing apparatus that can apply vacuum ultraviolet light to the entire surface of a wafer in excellent reproducibility and can process the wafer with VUV (vacuum ultraviolet) light in excellent reproducibility. A VUV light processing apparatus includes: a chamber connected with a gas supply apparatus and an evacuation apparatus, the chamber being capable of reducing the pressure inside the chamber; a plasma light source that generates VUV light including a wavelength of 200 nm or less, the plasma light source including a plasma generating unit that generates plasma in the chamber; and a VUV transmission filter provided between a stage on which a sample to be processed is placed and the sample in the chamber, the VUV transmission filter transmitting the VUV light including a wavelength of 200 nm or less and not transmitting electrons, ions, and radicals in plasma, the VUV transmission filter having the outer diameter size larger than that of the sample.
    Type: Application
    Filed: November 16, 2010
    Publication date: September 13, 2012
    Inventors: Seiichi Watanabe, Yutaka Kozuma, Tooru Aramaki, Naoki Yasui, Norihiko Ikeda, Hiroaki Takikawa
  • Publication number: 20120225561
    Abstract: There is provided a semiconductor device manufacturing method for forming a step-shaped structure in a substrate by etching the substrate having thereon a multilayer film and a photoresist film on the multilayer film and serving as an etching mask. The multilayer film is formed by alternately layering a first film having a first permittivity and a second film having a second permittivity different from the first permittivity. The method includes a first process for plasma-etching the first film by using the photoresist film as a mask; a second process for exposing the photoresist film to hydrogen-containing plasma; a third process for trimming the photoresist film; and a fourth process for etching the second film by using the trimmed photoresist film and the plasma-etched first film as a mask. The step-shaped structure is formed in the multilayer film by repeatedly performing the first process to the fourth process in this sequence.
    Type: Application
    Filed: March 2, 2012
    Publication date: September 6, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Seiichi Watanabe, Manabu Sato, Kazuki Narishige, Takanori Sato, Takayuki Katsunuma