Patents by Inventor Seiji Nagai

Seiji Nagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6420733
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1−Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1−Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light- emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: July 16, 2002
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Publication number: 20020006726
    Abstract: A method for manufacturing a laser diode using Group III nitride compound semiconductor comprising a buffer layer 2, an n+ layer 3, a cladding layer 4, an active layer 5, a p-type cladding layer 61, a contact layer 62, an SiO2 layer 9, an electrode 7 which is formed on the window formed in a portion of the SiO2 layer 9, and an electrode 8 which is formed on a portion of the n+ layer 3 by etching a portion of 4 layers from the contact layer 62 down to the cladding layer 4. One pair of opposite facets S of a cavity is formed by RIBE, and then the facets are etched by gas cluster ion beam etching using Ar gas. As a result, the facets S are flatted and the mirror reflection of the facets S is improved.
    Type: Application
    Filed: January 8, 1998
    Publication date: January 17, 2002
    Inventors: SHIRO YAMASAKI, SEIJI NAGAI, MASAYOSHI KOIKE, ISAMU AKASAKI, HIROSHI AMANO, ISAO YAMADA, JIRO MASUO
  • Publication number: 20010048112
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1-Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1-Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Application
    Filed: August 7, 2001
    Publication date: December 6, 2001
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 6326236
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1−Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1−Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: December 4, 2001
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 6284045
    Abstract: A monolithic refractory depositing system capable of improving working environment and working efficiency and of spraying a material in a uniform thickness is provided. The monolithic refractory depositing system is capable of carrying out both a spraying process and a casting process.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: September 4, 2001
    Assignee: Shinagawa Refractories Co., Ltd.
    Inventors: Ryosuke Nakamura, Toshihiko Kaneshige, Seiji Nagai, Keizo Nishimura
  • Publication number: 20010017099
    Abstract: A thick GaN layer is grown on sapphire through an Au layer at a temperature lower than the melting point of 1064° C. of the Au layer, and temperature of a sample is raised to reach and exceed the melting point of the Au layer so that the Au layer is dissolved. In this state, the sapphire and GaN layer are separated from each other.
    Type: Application
    Filed: December 27, 2000
    Publication date: August 30, 2001
    Inventors: Masayoshi Koike, Seiji Nagai
  • Patent number: 6076820
    Abstract: In a rotation transfer device, a paper feeding apparatus and an image forming apparatus, transfer projections are disposed on coupling members provided on the ends of a driving shaft and a driven shaft, so that the movement of one transfer projection in the peripheral direction can be constrained by the other transfer projection and a positioning member. Thus, rotation irregularity caused by reverse rotation torque applied by a function from the side of paper can be prevented.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: June 20, 2000
    Assignee: Fujitsu Limited
    Inventors: Seiji Nagai, Hiroaki Yoshida
  • Patent number: 6040588
    Abstract: A semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of In.sub.Y1 Ga.sub.1-Y1 N (Y1.gtoreq.0) and a quantum well layer being made of In.sub.Y2 Ga.sub.1-Y1 N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: March 21, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 5953581
    Abstract: As a method for manufacturing a laser diode using a group III nitride compound semiconductor, independent dry etching process for forming electrodes and mirror facets are adopted. A portion of an upper semiconductor layer is etched for forming a window. An electrode for a lower semiconductor layer is formed through the window. After electrodes are formed, then, etching is carried out for forming mirror facets of laser cavity. This method realizes high oscillation, because the method enhances parallel and vertical degrees of the mirror facets. Further, cleanness of the mirror facets are improved, because they are formed after the electrodes are formed. The method further lowers resistivity of lower semiconductor layer, because its thickness can be controlled easily without etching excessively. As a result, luminous efficiency is improved.
    Type: Grant
    Filed: April 17, 1997
    Date of Patent: September 14, 1999
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shiro Yamasaki, Seiji Nagai, Masayoshi Koike
  • Patent number: 5889806
    Abstract: A laser diode using Group III nitride compound semiconductor consists of In.sub.0.2 Ga.sub.0.8 N/GaN SQW active layer 5, a pair of GaN guide layers 41 and 62, sandwiching the active layer with wider forbidden band than the active layer, and a pair of Al.sub.0.08 Ga.sub.0.92 N cladding layer 4 and 71, sandwiching a pair of the guide layers, and the LD confines carriers and light separately. Al.sub.0.15 Ga.sub.0.75 N stopper layers 41 and 62 with wider forbidden band than the guide layers are formed in some portion of each of the guide layers 41 and 62 in parallel to the active layer. As a result, carriers are confined in the active layer and the laser output of the LD is improved.
    Type: Grant
    Filed: August 8, 1997
    Date of Patent: March 30, 1999
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Seiji Nagai, Shiro Yamasaki, Masayoshi Koike, Kazuyoshi Tomita, Tetsu Kachi, Isamu Akasaki, Hiroshi Amano
  • Patent number: 5811319
    Abstract: A surface of a compound semiconductor having at least gallium (Ga) and nitride (N) forms a target for sputtering with inert gas, so that oxide and other attachments are removed therefrom. The sputtering the surface is carried out until a disruption layer is formed which has atomically disordered and bumpy arrangement. Following the sputtering process, metal deposition by sputtering and alloying are carried out under vacuum in the same chamber used for the sputtering processes. As a result, the contact resistance between the surface layer and the deposited electrode layer is decreased.
    Type: Grant
    Filed: March 26, 1996
    Date of Patent: September 22, 1998
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masayoshi Koike, Seiji Nagai, Shiro Yamasaki, Masanori Murakami, Katsuyuki Tsukui, Hidenori Ishikawa
  • Patent number: 5805790
    Abstract: In a fault recovery method for a multi-processor system including a main storage and a plurality of virtual machines which are assigned to a plurality of processors under control of a host operating system and a plurality of guest operating systems and which operate on the processors associated therewith, a fault occurring in one of the processors is detected to recover functions of the system.
    Type: Grant
    Filed: March 20, 1996
    Date of Patent: September 8, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Tadashi Nota, Masaichiro Yoshioka, Seiji Nagai, Shunji Tanaka, Toshiyuki Kinoshita
  • Patent number: 5615001
    Abstract: A plurality of electrostatic recording units are arranged in series along a path for moving a recording sheet of paper, and charged toner images having different colors are formed on the sheet of paper travelled through the path. A paper feeder unit is arranged beneath a paper introduction side of the paper moving path. The sheet of paper carrying the toner image formed thereon is ejected from a paper ejection side of the paper moving path, and is sent to a fixer in which the toner image is fixed on the sheet of paper. The sheet of paper carrying the toner image fixed thereon is sent to a paper receiver tray positioned above the fixer.
    Type: Grant
    Filed: June 29, 1995
    Date of Patent: March 25, 1997
    Assignee: Fujitsu Limited
    Inventors: Masato Kawashima, Hideyuki Shimobuchi, Hiroyuki Okitsu, Masato Matsuzuki, Hiroaki Yoshida, Michihiro Fujii, Yukinari Okawa, Masaru Iida, Katsuyasu Ito, Yukihide Toda, Seiji Nagai
  • Patent number: 5267350
    Abstract: An instruction fetch control method is generally arranged so as to have a plurality of instruction buffers, issue an instruction read request to a memory when a part of the instruction buffers becomes in an empty state and store a fetched instruction in the instruction buffer in an empty state. A flag is provided for specifying another instruction buffer which becomes in an empty state after the instruction stored in the instruction buffer is transmitted to a decoder. The quantity of instructions to be stored in the instruction buffer is made variable in accordance with output of the flag latch, and the fetched instruction is stored in the instruction buffer in an empty state. This arrangement enables a plurality of instructions fetched upon an instruction read request to be stored in the empty instruction buffers, thereby reducing the number of read requests issued.
    Type: Grant
    Filed: October 25, 1990
    Date of Patent: November 30, 1993
    Inventors: Kenji Matsubara, Seiji Nagai, Tohru Shonai, Akihiro Fuseda
  • Patent number: 4783783
    Abstract: A data processing system includes a multistage pipeline arithmetic/logic operation unit for implementing an arithmetic or logic operation for sets of element data sequentially and storing operational results sequentially in a memory using a single instruction. Check information indicative of the presence or absence of a fault occurring in each stage of the pipeline operation unit is moved in synchronism with the advancement of stages of the pipeline operation unit. A request control unit for storing the operational result in the memory suppresses the storing of the operational result in the memory if check information indicates a fault of the operational result which is being stored in the memory. The request control unit issues storage requests, which are counted by a counter. The counter indicates the number of elements stored normally in the memory.
    Type: Grant
    Filed: July 24, 1986
    Date of Patent: November 8, 1988
    Assignees: Hitachi, Ltd., Hitachi Computer Eng. Co.
    Inventors: Seiji Nagai, Takaaki Nishiyama, Hiromichi Kainoh, Fujio Wakui
  • Patent number: 4695167
    Abstract: An apparatus for mixing and pumping slurry which is mixed with a refractory aggregate material in a gunning nozzle, characterized in that the apparatus is provided at its upper portion with a slurry mixing apparatus and its lower portion with a pumping apparatus which feeds the slurry under pressure by pump. The mixing apparatus includes an opening at the bottom thereof for the downward discharge of the slurry from the mixing apparatus. The pumping apparatus includes an opening at the top thereof positioned directly below the discharge opening of the mixing apparatus for delivering the slurry to the pump, thereby allowing the regulation and pumping of the slurry to be carried out simultaneously. The slurry is pumped to a gunning nozzle for admixture in a predetermined ratio with refractory aggregate.
    Type: Grant
    Filed: October 11, 1985
    Date of Patent: September 22, 1987
    Assignee: Shinagawa Refractories Co., Ltd.
    Inventors: Masashi Mori, Shingo Nonaka, Seiji Nagai
  • Patent number: 4421697
    Abstract: There is disclosed the distribution of an amorphous refractory in a case where a lining frame is positioned within a molten metal vessel preliminarily lined with a permanent lining refractory and the amorphous refractory is cast into the space between the permanent lining refractory and the lining frame thereby applying a lining to the inner surface of the vessel.A conical distributor is arranged above the lining frame and the amorphous refractory is continuously delivered from a rotary chute onto the distributor so as to describe a concentric path of moving falling points.
    Type: Grant
    Filed: May 7, 1982
    Date of Patent: December 20, 1983
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Kiyomi Taguchi, Osamu Terada, Noriaki Morishita, Hiroshi Mihashi, Seiji Nagai
  • Patent number: 3988938
    Abstract: A gate motion mechanism for continuously driving an arm to perform a gate motion, or a combination of two or more differently directed rectilineal motions, has a cam groove or grooves of a contour corresponding to the path of motion the arm is to follow, and a guide roller or rollers integrally connected to the arm, each of the roller being fitted in the cam groove and linked to a driving mechanism via a lever for sliding movement along the groove.
    Type: Grant
    Filed: June 5, 1975
    Date of Patent: November 2, 1976
    Assignee: Mitsubishi Jukogyo Kabushiki Kaisha
    Inventor: Seiji Nagai