Patents by Inventor Sei-jin Kim
Sei-jin Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10983792Abstract: A memory device performing an internal copy operation is provided. The memory device may receive a source address, a destination address, and page size information together with an internal copy command, compares the source address with the destination address, and performs an internal copy operation. The internal copy operation may be an internal block copy operation, an inter-bank copy operation, or an internal bank copy operation. The internal copy operation may be performed with respect to one-page data, half-page data, or quarter-page data, based on the page size information. The memory device may output as a flag signal a copy-done signal indicating that the internal copy operation has been completed.Type: GrantFiled: November 13, 2018Date of Patent: April 20, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Young-soo Sohn, Sei-jin Kim, Kwang-il Park, Tae-young Kim, Chul-woo Park
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Patent number: 10372333Abstract: An electronic device is provided. The electronic device includes a first memory, a second memory, and a control module configured, when a file storing event occurs, to divide a file inputted from outside of the electronic device into a plurality of files, to store a portion of the divided files in the first memory, and to store another portion of the divided files in the second memory, wherein one of the first memory and the second memory includes a header notifying a storage location of the divided files.Type: GrantFiled: June 9, 2015Date of Patent: August 6, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Sung Hwan Yun, Sei Jin Kim
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Publication number: 20190079760Abstract: A memory device performing an internal copy operation is provided. The memory device may receive a source address, a destination address, and page size information together with an internal copy command, compares the source address with the destination address, and performs an internal copy operation. The internal copy operation may be an internal block copy operation, an inter-bank copy operation, or an internal bank copy operation. The internal copy operation may be performed with respect to one-page data, half-page data, or quarter-page data, based on the page size information. The memory device may output as a flag signal a copy-done signal indicating that the internal copy operation has been completed.Type: ApplicationFiled: November 13, 2018Publication date: March 14, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Young-soo Sohn, Sei-jin KIM, Kwang-il PARK, Tae-young KIM, Chul-woo PARK
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Patent number: 10209915Abstract: An electronic device is provided. The electronic device includes at least one first memory being nonvolatile and a processor configured to read a file from the first memory or to write a file on the first memory. The first memory stores instructions, the instructions, when executed, causing the processor to provide a software layer structure including a first virtual file system layer configured to interface with an application program layer, a compressed file system layer configured to compress at least a part of data of the written file or to decompress at least a part of data of the read file, a second virtual file system layer configured to manage the written or read file, and a first file system layer configured to read at least a part of the file from the first memory or to write at least a part of the file on the first memory.Type: GrantFiled: April 14, 2016Date of Patent: February 19, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Sung Hwan Yun, Woo Joong Lee, Sei Jin Kim, Min Jung Kim, Jong Min Kim, Sung Jong Seo, Jun Beom Yeom, Sang Woo Lee, Jong Woo Hong
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Patent number: 10169042Abstract: A memory device performing an internal copy operation is provided. The memory device may receive a source address, a destination address, and page size information together with an internal copy command, compares the source address with the destination address, and performs an internal copy operation. The internal copy operation may be an internal block copy operation, an inter-bank copy operation, or an internal bank copy operation. The internal copy operation may be performed with respect to one-page data, half-page data, or quarter-page data, based on the page size information. The memory device may output as a flag signal a copy-done signal indicating that the internal copy operation has been completed.Type: GrantFiled: September 14, 2015Date of Patent: January 1, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Young-soo Sohn, Sei-jin Kim, Kwang-il Park, Tae-young Kim, Chul-woo Park
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Patent number: 9627015Abstract: A memory device, system, and/or method are provided for performing a page state informing function. The memory device may compare one or more row addresses received along with a command, determine the page open/close state according to a page hit or miss generated as a result of comparison, count read or write commands with respect to pages corresponding to a same row address, and determine the page open/close state according to a read or write command number generated as a result of counting. The memory device may determine a page open/close state with respect to a corresponding page based on a page hit/miss and a read or write command number and output a flag signal. The memory device may provide the page open/close state for each channel. A memory controller may establish different page open/close policies for each channel.Type: GrantFiled: September 14, 2015Date of Patent: April 18, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Young-soo Sohn, Kwang-il Park, Sei-jin Kim, Tae-young Kim
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Publication number: 20160306583Abstract: An electronic device is provided. The electronic device includes at least one first memory being nonvolatile and a processor configured to read a file from the first memory or to write a file on the first memory. The first memory stores instructions, the instructions, when executed, causing the processor to provide a software layer structure including a first virtual file system layer configured to interface with an application program layer, a compressed file system layer configured to compress at least a part of data of the written file or to decompress at least a part of data of the read file, a second virtual file system layer configured to manage the written or read file, and a first file system layer configured to read at least a part of the file from the first memory or to write at least a part of the file on the first memory.Type: ApplicationFiled: April 14, 2016Publication date: October 20, 2016Inventors: Sung Hwan Yun, Woo Joong Lee, Sei Jin Kim, Min Jung Kim, Jong Min Kim, Sung Jong Seo, Jun Beom Yeom, Sang Woo Lee, Jong Woo Hong
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Publication number: 20160147460Abstract: A memory device performing an internal copy operation is provided. The memory device may receive a source address, a destination address, and page size information together with an internal copy command, compares the source address with the destination address, and performs an internal copy operation. The internal copy operation may be an internal block copy operation, an inter-bank copy operation, or an internal bank copy operation. The internal copy operation may be performed with respect to one-page data, half-page data, or quarter-page data, based on the page size information. The memory device may output as a flag signal a copy-done signal indicating that the internal copy operation has been completed.Type: ApplicationFiled: September 14, 2015Publication date: May 26, 2016Inventors: Young-soo SOHN, Sei-jin KIM, Kwang-il PARK, Tae-young KIM, Chul-woo PARK
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Publication number: 20160148654Abstract: A memory device, system, and/or method are provided for performing a page state informing function. The memory device may compare one or more row addresses received along with a command, determine the page open/close state according to a page hit or miss generated as a result of comparison, count read or write commands with respect to pages corresponding to a same row address, and determine the page open/close state according to a read or write command number generated as a result of counting. The memory device may determine a page open/close state with respect to a corresponding page based on a page hit/miss and a read or write command number and output a flag signal. The memory device may provide the page open/close state for each channel. A memory controller may establish different page open/close policies for each channel.Type: ApplicationFiled: September 14, 2015Publication date: May 26, 2016Inventors: Young-soo SOHN, Kwang-il PARK, Sei-jin KIM, Tae-young KIM
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Publication number: 20160124674Abstract: Provided is a method and apparatus for controlling a plurality of memory devices. According to various embodiments of the present disclosure, there is provided an electronic device. The electronic device includes a first memory and a second memory, and a processor that is functionally connected with the first memory and the second memory. The processor is configured to determine at least one state associated with the electronic device, and allocate at least a partial area of one of the first memory and the second memory to at least some data of at least one process to be executed in the electronic device based on the at least one state. Other embodiments are possible.Type: ApplicationFiled: November 4, 2015Publication date: May 5, 2016Inventors: Bo-Young Seo, Min-Jung Kim, Jung-Yup Kang, Sei-Jin Kim, Dong-Wook Suh, Sung-Hwan Yun
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Patent number: 9293362Abstract: This technology provides a semiconductor device and a method of fabricating the same, which may reduce parasitic capacitance between adjacent conductive structures. The method of fabricating a semiconductor device may include forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers over sidewalls of the contact holes, forming first plugs recessed into the respective contact holes, forming air gaps by removing the sacrificial spacers, forming capping structures capping the air gaps while exposing top surfaces of the first plugs, and forming second plugs over the first plugs.Type: GrantFiled: March 13, 2013Date of Patent: March 22, 2016Assignee: SK Hynix Inc.Inventors: Nam-Yeal Lee, Seung-Jin Yeom, Sung-Won Lim, Seung-Hee Hong, Hyo-Seok Lee, Dong-Seok Kim, Seung-Bum Kim, Sei-Jin Kim
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Publication number: 20150363112Abstract: An electronic device is provided. The electronic device includes a first memory, a second memory, and a control module configured, when a file storing event occurs, to divide a file inputted from outside of the electronic device into a plurality of files, to store a portion of the divided files in the first memory, and to store another portion of the divided files in the second memory, wherein one of the first memory and the second memory includes a header notifying a storage location of the divided files.Type: ApplicationFiled: June 9, 2015Publication date: December 17, 2015Inventors: Sung Hwan YUN, Sei Jin KIM
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Patent number: 9208837Abstract: The present disclosure relates to an apparatus and method capable of carrying out data movement in a memory of a terminal. The apparatus includes a processor configured to transmit a command for data movement and address information for data movement in a memory to the memory, and the memory configured to perform the data movement in units of word line in the memory by using the address information, in response to reception of the command for moving the data.Type: GrantFiled: August 23, 2013Date of Patent: December 8, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Sei-Jin Kim, Sang-Ho Shin, Hee-Sub Shin
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Publication number: 20140208006Abstract: An apparatus and a method capable of selectively extending a memory in a terminal are provided. The apparatus includes a socket unit into which an external memory having a built-in Random Access Memory (RAM) is inserted, and a controller that performs a control operation for moving data stored in a RAM of the terminal to the RAM of the external memory and for securing available space of the RAM of the terminal, when the external memory having the built-in RAM is inserted into the socket unit.Type: ApplicationFiled: January 15, 2014Publication date: July 24, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Sung-Hwan YUN, Sei-Jin KIM
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Patent number: 8767450Abstract: A memory system includes a memory cell array having a plurality of memory sectors. Each memory sector includes a plurality of memory cells. The memory system further includes a controller configured to write data to the memory cell array in response to a writing signal. The controller is further configured to refresh a memory sector among the plurality of memory sectors each time a writing signal is provided. When N (N is a positive integer) memory cells are programmed, a programming current is less than or equal to about 0.75 mA*N.Type: GrantFiled: May 13, 2010Date of Patent: July 1, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Doo-gon Kim, Hui-kwon Seo, Cheol-kyu Kim, Sei-jin Kim, Yoon-ho Khang, Han-gu Sohn, Tae-yon Lee, Dae-won Ha
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Publication number: 20140175659Abstract: This technology provides a semiconductor device and a method of fabricating the same, which may reduce parasitic capacitance between adjacent conductive structures. The method of fabricating a semiconductor device may include forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers over sidewalls of the contact holes, forming first plugs recessed into the respective contact holes, forming air gaps by removing the sacrificial spacers, forming capping structures capping the air gaps while exposing top surfaces of the first plugs, and forming second plugs over the first plugs.Type: ApplicationFiled: March 13, 2013Publication date: June 26, 2014Inventors: Nam-Yeal LEE, Seung-Jin YEOM, Sung-Won LIM, Seung-Hee HONG, Hyo-Seok LEE, Dong-Seok KIM, Seung-Bum KIM, Sei-Jin KIM
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Publication number: 20140059285Abstract: The present disclosure relates to an apparatus and method capable of carrying out data movement in a memory of a terminal. The apparatus includes a processor configured to transmit a command for data movement and address information for data movement in a memory to the memory, and the memory configured to perform the data movement in units of word line in the memory by using the address information, in response to reception of the command for moving the data.Type: ApplicationFiled: August 23, 2013Publication date: February 27, 2014Applicant: Samsung Electronics Co., LtdInventors: Sei-Jin Kim, Sang-Ho Shin, Hee-Sub Shin
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Publication number: 20130346678Abstract: A memory expanding device includes an input and output part coupleable to an external optical interface, a controller coupled to the input and output part through a first internal optical interface, a main memory module coupled to the controller through a second internal optical interface, and a sub-memory module coupled to the controller through a first internal electrical interface.Type: ApplicationFiled: March 14, 2013Publication date: December 26, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ein-Sung JO, Sei-Jin KIM, Ha-Ryong YOON, Kyoung-Ho HA
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Publication number: 20130328199Abstract: A method for fabricating memory device includes forming a bit line pattern including a first conductive layer and a hard mask stacked over a substrate, forming a sacrificial layer on sidewalls of the bit line pattern, forming a second conductive layer in contact with the sacrificial layer and adjacent to the bit line pattern, recessing the second conductive layer, forming an air gap between the recessed second conductive layer and the first conductive layer by removing the sacrificial layer, and forming an air gap capping layer on sidewalls of the hard mask to cap entrance of the air gap.Type: ApplicationFiled: December 19, 2012Publication date: December 12, 2013Applicant: SK HYNIX INC.Inventors: Hyo-Jun YUN, Sei-Jin KIM, Hae-Il SONG
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Patent number: 8574988Abstract: A method for forming a highly integrated semiconductor device having multiplayer conductive lines is presented. The method includes the operations of forming, etching, burying and forming. The first forming operation includes forming a line-type conductive layer on a semiconductor substrate including a buried gate to expose the gate. The etching operation includes etching the conductive layer to expose at least a region between one side of an active area defined in the semiconductor substrate and an opposite side of the neighboring active area, both the active areas being arranged next to each other in a major axis direction of the gate. The burying operation includes burying a first insulating film in the etched line-type conductive layer. The second forming operation includes forming a bit line passing through the center of the active area in a direction perpendicular to the major axis direction of the gate.Type: GrantFiled: December 30, 2009Date of Patent: November 5, 2013Assignee: Hynix Semiconductor Inc.Inventor: Sei Jin Kim