Patents by Inventor Seisuke Morioka

Seisuke Morioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9979922
    Abstract: A display device (2) includes a processor (13) that outputs drawing data and a timing controller (11) that outputs the drawing data input from the processor according to horizontal synchronization and vertical synchronization. When a still image region where drawing data has not been updated compared with a previous frame and a moving image region where drawing data has been updated compared with a previous frame are included in one frame, the processor transmits data update information, which is for specifying the position of the moving image region or a line including the moving image region, to the timing controller temporally earlier than drawing data of the line including the moving image region. The timing controller performs processing for lowering the frame rate of the still image region or processing for thinning out some of image lines of the still image region based on the data update information.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: May 22, 2018
    Assignee: CEREBREX, INC.
    Inventors: Kenzo Konishi, Shinya Suzuki, Seisuke Morioka, Masahiro Kato
  • Publication number: 20170295343
    Abstract: A display device (2) includes a processor (13) that outputs drawing data and a timing controller (11) that outputs the drawing data input from the processor according to horizontal synchronization and vertical synchronization. When a still image region where drawing data has not been updated compared with a previous frame and a moving image region where drawing data has been updated compared with a previous frame are included in one frame, the processor transmits data update information, which is for specifying the position of the moving image region or a line including the moving image region, to the timing controller temporally earlier than drawing data of the line including the moving image region. The timing controller performs processing for lowering the frame rate of the still image region or processing for thinning out some of image lines of the still image region based on the data update information.
    Type: Application
    Filed: April 10, 2017
    Publication date: October 12, 2017
    Inventors: Kenzo KONISHI, Shinya SUZUKI, Seisuke MORIOKA, Masahiro KATO
  • Patent number: 7079150
    Abstract: The present invention includes a processor, a storage device having compressed texture data, a texture buffer having decompressed texture data. The processor reads the compressed texture data from the storage device and decompresses the texture data. The processor then stores the decompressed texture data in the texture buffer.
    Type: Grant
    Filed: May 7, 1998
    Date of Patent: July 18, 2006
    Assignee: Kabushiki Kaisha Sega Enterprises
    Inventor: Seisuke Morioka
  • Patent number: 6683617
    Abstract: Disclosed are an antialiasing method and an image processing apparatus using the same, capable of high-quality image display without any significant reduction in processing speed and without any significant increase in the apparatus scale. Pixel data contains information on a subpixel mask indicative of region which a polygon occupies within a pixel. Based on data sets consisting of the subpixel masks and color data contained in the pixel data, display colors are determined on a pixel-by-pixel basis.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: January 27, 2004
    Assignee: Sega Enterprises, Ltd.
    Inventors: Junichi Naoi, Seisuke Morioka
  • Patent number: 6680741
    Abstract: A computer graphic system wherein image element data can be processed efficiently at a high speed, and images of higher quality are produced at a lower cost than conventional. An image processor for dividing a screen into regions (fragments) of predetermined sizes and processing data on every divided region (fragment), wherein pieces of information on image constituting elements are rearranged in a direction vertical to a scanning line (ST1), the pieces of information on the image constituting elements are rearranged in a direction parallel to the scanning line (ST2), and image processing for opaque polygons, polygons with transparent pixels, and semitransparent polygons is performed in the order of mention on the basis of the rearranged pieces of information (ST3 to ST6).
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: January 20, 2004
    Assignee: Sega Enterprises, Ltd.
    Inventors: Keisuke Yasui, Seisuke Morioka, Jun Okubo
  • Patent number: 6677955
    Abstract: The present invention is characterized by first performing the necessary rendering in the frame period, then during the remaining time of that frame period, rewriting the texture data in the texture buffer memory. The image rendering process for each frame is performed first, then after the rendering process has been completed for the frame, if there is remaining time, that time is used to rewrite the texture data. Therefore, the rendering process is not interrupted, the displayed image is not interrupted or frozen, and it is possible to rewrite the texture data in the small-capacity texture buffer memory and make it possible to use virtually a lot of texture data to render one scene.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: January 13, 2004
    Assignee: Sega Enterprises, Ltd.
    Inventor: Seisuke Morioka
  • Patent number: 6549209
    Abstract: The object is to increase the efficiency of processing by conferring the residual image function on hardware and to provide an image processing device wherein processing is implemented at higher speed. In an image processing device equipped with an image memory and a control section that writes generated image data to the image memory, there is provided a blend circuit that reads image memory or image data from image memory and attenuates the read image data and that writes this together with newly generated image data into another image memory, thereby producing a residual image effect.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: April 15, 2003
    Assignee: Kabushiki Kaisha Sega Enterprises
    Inventors: Mikio Shinohara, Seisuke Morioka
  • Patent number: 6522337
    Abstract: An image processing apparatus of the present invention conducts update processing of MIPMAP-format texture data within an updateable range, and during drawing processing, it ascertains the level of detail to which texture data has been updated. Thereupon, when conducting texture mapping, texture data of the level of detail for which updating has been completed is used. In this case, if the required texture data has not been updated, then it is substituted by texture data for which updating has been completed. Consequently, even in cases where updating of all texture data is not completed in time, it is possible to prevent significant distortion of the image due to mixing of updated and non-updated texture.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: February 18, 2003
    Assignee: Sega Enterprises, Ltd.
    Inventor: Seisuke Morioka
  • Patent number: 6333742
    Abstract: A table is used in forming spotlight characteristics that impart illumination effects to polygon images displayed by an image processing system, and the number of light sources that can be used in an image scene is increased above the number of light sources that can be used simultaneously. In order to realize this, a method of forming spotlight effect characteristics attached to pixels configuring polygons is proposed wherein a plurality of characteristic values corresponding to a prescribed spotlight characteristic curve is held in a table, and said spotlight characteristic curve is formed from characteristic values read out from the table and from interpolated values found by interpolating between adjacent characteristic values. Inner products are found between spot light axis vectors and light vectors extending toward pixels, these values of inner products so found are used as addresses, and characteristic values are read out from appropriate addresses of the table.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: December 25, 2001
    Assignee: Sega Enterprises, Ltd.
    Inventors: Seisuke Morioka, Keisuke Yasui
  • Patent number: 6320580
    Abstract: Disclosed are an image processing apparatus and an image processing method, which can efficiently execute a hidden-surface process, a blending process on translucent polygons and a shading process by a light source all in a rendering process.
    Type: Grant
    Filed: November 2, 1998
    Date of Patent: November 20, 2001
    Assignee: Sega Enterprises, Ltd.
    Inventors: Keisuke Yasui, Jun Okubo, Seisuke Morioka, Junichi Naoi
  • Patent number: 6239809
    Abstract: The present invention relates to an image processing device comprising a rendering processing section for generating color data for pixels which are to be displayed from polygon data including at least a polygon ID, positional co-ordinates data and parameters for generating color data attributed thereto. The image processing device includes a polygon buffer memory for storing color data for pixels in a flame. The rendering processing section includes a first processing section (242, 243, 244, 245) for generating Z values of pixels in respective polygons in the frame and for storing Z values for pixels to be displayed on the screen and the polygon ID corresponding thereto in a Z value buffer memory. The rendering processing section includes a second processing section (246, 247, 248) for generating color data from the parameters attributed to the polygon IDs stored in the Z buffer memory for each pixels in the frame and for storing the color data in the frame buffer memory.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: May 29, 2001
    Assignee: Sega Enterprises, Ltd.
    Inventors: Seisuke Morioka, Keisuke Yasui
  • Patent number: 6005584
    Abstract: A method of the present invention relates to a method of blending a plurality of pixels on a texture map and to a plural pixel blending circuit and image processing device using this is disclosed. The method of blending a plurality of pixels on a texture map corresponding to the pixels constituting a polygon, thereby finding texture data to be pasted on to the pixels constituting the polygon, includes the steps of: determining whether or not there are transparent pixels in said plurality of pixels on the texture map; if there are no transparent pixels, blending said plurality of pixels on the texture map in accordance with the ratio with which a pixel constituting the polygon corresponds therewith; if some of the plurality of pixels on the texture map are transparent pixels, substituting the transparent pixels by other adjacent pixels which are not transparent; and if all of the plurality of pixels on the texture map are transparent pixels, ignoring the plurality of pixels on the texture map.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: December 21, 1999
    Assignee: Sega Enterprises, Ltd.
    Inventors: Kenya Kitamura, Seisuke Morioka
  • Patent number: 5995111
    Abstract: An image processing apparatus for generating image data to be displayed on a predetermined display screen, comprises an image data generator for receiving polygon information of a polygon including at least position information on the display screen and generating image data corresponding to pixels in the polygon; a frame buffer memory for storing image data pixel by pixel; a blur-value buffer memory for storing information of a degree of influence of the image data of each pixel on pixels therearound, as a blur value, in a predetermined pixel unit; and a blur processor for performing an arithmetic operation on the image data of each pixel, read from the frame buffer memory, in accordance with the degree of influence from surrounding pixels, read from the blur-value buffer memory, to generate image data to be displayed on the display screen, and by a method for this apparatus.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: November 30, 1999
    Assignee: Sega Enterprises, Ltd.
    Inventors: Seisuke Morioka, Masaru Takano
  • Patent number: 5973698
    Abstract: A polygon data sorting method and a polygon data sorting system is disclosed where the required memory capacity is not affected by changes in target data. The method sorts polygon data stored in an arbitrary order in an increasing or decreasing direction of a reference value which may be the depth of the polygon, for example. The polygon data is rearranged using the order of the reference values as an arrangement standard and includes the steps of dividing the reference values of the plurality of polygon data sets into upper digits and lower digits, registering values for the upper digits in an increasing or decreasing direction, registering the values for the upper digits and values at corresponding lower digits, and registering index numbers indicating positions where the stored polygon data reside. The polygon data may then be read in an order represented by the index numbers that correspond to the increasing or descending order of the values for the upper digits that are registered.
    Type: Grant
    Filed: March 14, 1997
    Date of Patent: October 26, 1999
    Assignee: Sega Enterprises, Ltd.
    Inventors: Masayuki Suzuki, Seisuke Morioka
  • Patent number: 5946004
    Abstract: A video game device is disclosed which is composed of a console apparatus in which a processor is installed to execute a game software program. The video game device also includes a memory device, such as a memory cartridge which is removably attached to the console apparatus and which stores the game program. An enhanced function board is attached to the main body of the video game device for improving and enhancing the functions of the video game. The enhanced function board includes a pair of buses, first and second digital processors connected to the buses, a FIFO memory connected between the buses, and an interface circuit connected to the pair of buses. The interface circuit operates to connect the first and second digital processors to the processor of the video game device.
    Type: Grant
    Filed: February 10, 1997
    Date of Patent: August 31, 1999
    Assignee: Sega Enterprises, Ltd.
    Inventors: Kenya Kitamura, Masayuki Suzuki, Seisuke Morioka, Ryoji Kuroda