Abstract: An image sensor includes a pixel array and N analog-to-digital converters (ADCs). The pixel array includes N pixels arranged in each of a plurality of rows, and each of the N pixels include M photoelectric conversion elements. At least one of the N ADCs are shared by at least one of the M photoelectric conversion elements included in each of the N pixels.

Abstract: A method of operating an image processing system includes storing differences between first analog pixel signals and second analog pixel signals and converting the stored differences to one-bit digital signals, the first analog pixel signals being output from a plurality of pixels and corresponding to a previous frame, and the second analog pixel signals being output from the plurality of pixels and corresponding to a current frame.

Abstract: An image sensor includes a pixel array including preview pixels and capture pixels, a first readout circuit configured to communicate a preview image data generated by the preview pixels to a digital signal processor via a first interface, a second readout circuit configured to communicate a captured image data generated by the capture pixels to the digital signal processor via a second interface different from the first interface, and a controller configured to control the first readout circuit and the second readout circuit to communicate the preview image data and the captured image data in parallel to the digital signal processor.

Abstract: An image sensor includes a first column pair and a second column pair among a plurality of columns of a pixel array, an analog-to-digital converter pair, and a switch arrangement circuit configured to connect the first column pair with the analog-to-digital converter pair in response to first switch control signals such that two rows among a plurality of rows in the pixel array are read during a single access time.

Abstract: An image sensor for reducing channel variation and an image processing system including the same. The image sensor includes first to mth pixels (m?2), each of which is connected to a corresponding column line from among first to mth column lines and is configured to output a respective pixel signal.’ The image sensor further includes first to mth bias circuits, each of which is connected to a corresponding column line from among the first to mth column lines and is configured to fix a voltage of the corresponding column line to a bias voltage when a column line-specific pixel is not selected to output the respective pixel signal. An analog-to-digital converter in the image sensor is configured to convert the pixel signals into digital signals.

Abstract: An analog-to-digital converter includes a gain amplification unit configured to receive a pixel signal at a first node and to amplify a gain of the pixel signal, a first capacitor connected between the first node and a second node, an amplifier configured to receive and amplify a signal output from the gain amplification unit and the first capacitor, and a conversion circuit configured to convert an output signal of the amplifier to a digital signal based on a reference signal and output the digital signal as a first output signal.

Abstract: An image sensor includes a pixel array and an analog-to-digital (A/D) conversion unit. The pixel array generates an analog signal by sensing an incident light. The A/D conversion unit generates a digital signal in a first operation mode by performing a sigma-delta A/D conversion and a cyclic A/D conversion with respect to the analog signal and generates the digital signal in a second operation mode by performing a single-slope A/D conversion with respect to the analog signal. The image sensor provides a high-quality image in a still image photography mode and a dynamic image video mode.

Abstract: Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and including a first active region, a first source/drain region, a first gate insulating layer, and a first gate electrode; and a low voltage transistor formed in the low voltage region and including a second active region, a second source/drain region, a second gate insulating layer, and a second gate electrode. The second source/drain region has a smaller thickness than a thickness of the first source/drain region.

Abstract: One embodiment of an analog-to-digital converter includes at least one comparator and a restriction circuit. The comparator has first and second input nodes and a connection node. The connection node is one of an internal node and an output node of the comparator. The restriction circuit is electrically connected to the connection node, and the restriction circuit is configured to restrict a voltage of the connection node.

Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.

Abstract: An image sensor includes a pixel array and a plurality of pairs of column lines. The pixel array includes a plurality of unit pixel areas arranged in a plurality of rows and columns. Each of the unit pixel areas includes a readout circuit connected to a corresponding pair of column lines, and first and second photo-electric conversion devices sharing the readout circuit. Each of the unit pixel areas is configured to output a first pixel signal corresponding to a photoelectron generated by the first photo-electric conversion device through the first column line, and to output a second pixel signal corresponding to a photoelectron generated by the second photo-electric conversion device through the second column line.

Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.

Abstract: A line memory device includes a plurality of memory cells, a data line pair, a sense amplifier and an output unit. The plurality of memory cells are disposed adjacent to each other in a line. The data line pair is coupled to the memory cells to sequentially transfer memory data bits stored in the memory cells to the sense amplifier. The sense amplifier is configured to amplify the memory data bits that are sequentially transferred through the data line pair by corresponding delay times which are different from each other. The output unit samples an output of the sense amplifier to sequentially output retimed data bits of the memory data bits in response to a read clock signal. The read clock signal has a cyclic period which is less than a maximum delay time among the delay times.

Abstract: A correlated double sampling (CDS) circuit included in an image sensor includes a sampling unit and a timing controlled band-limitation (TCBL) unit. The sampling unit is configured to generate an output signal by performing a CDS operation with respect to a reset component of an input signal and an image component of the input signal based on a ramp signal, the input signal being provided from a pixel array included in the image sensor. The TCBL unit is connected to the sampling unit, and is configured to remove noise from the output signal based on a timing control signal. The timing control signal is activated during a first comparison duration, in which a first comparison operation is performed with respect to the ramp signal and the reset component of the input signal, and during a second comparison duration, in which a second comparison operation is performed with respect to the ramp signal and the image component of the input signal.

Abstract: A data sampler and a photo detecting apparatus compensate a reference signal with offset information measured from a unit pixel, and compare an offset-compensated reference signal with a data signal, thereby minimizing the impact of an offset occurring with an increase of gain in the data sampler.

Abstract: A programmable gain amplifier includes a sampling circuit, a source follower, a first capacitor and an error amplifier. The sampling circuit is configured to perform correlated double sampling on an input signal using a reference voltage. The first capacitor is connected between the sampling circuit and the source follower. The error amplifier is connected between an input terminal of the source follower and an output terminal of the source follower. The error amplifier is configured to reset a voltage of the output terminal of the source follower to the reference voltage during a source follower reset operation.

Abstract: A line memory device includes a plurality of memory cells, a data line pair, a sense amplifier and an output unit. The plurality of memory cells are disposed adjacent to each other in a line. The data line pair is coupled to the memory cells to sequentially transfer memory data bits stored in the memory cells to the sense amplifier. The sense amplifier is configured to amplify the memory data bits that are sequentially transferred through the data line pair by corresponding delay times which are different from each other. The output unit samples an output of the sense amplifier to sequentially output retimed data bits of the memory data bits in response to a read clock signal. The read clock signal has a cyclic period which is less than a maximum delay time among the delay times.

Abstract: A method of binning pixels in an image sensor including: dividing a pixel array into a plurality of binning areas, wherein each binning area includes (2n)*(2n) pixels, wherein n is an integer equal to or greater than two; and generating binning pixel data in each of the binning areas, wherein the locations of the binning pixel data of each binning area are evenly distributed within the binning area.

Abstract: Image sensors include an array of image sensor pixels therein. This array of image sensor pixels includes a first focus detection pixel and at least a first color pixel. A switching network is provided, which is electrically coupled to the array. This switching network may be configured to generate a first mixed image signal by electronically mixing a focus detection signal generated by the first focus detection pixel with at least one color pixel signal generated by the at least a first color pixel. The first focus detection pixel can be a color-blind pixel, which may include a light-blocking shield mask therein.

Abstract: A CDS circuit includes first capacitors; second capacitors; and a switch arrangement which, in response to a switch control signal, connects the first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the second capacitors in parallel between the ramp signal output node and a second input node of the comparator.