Patents by Inventor Seok-Hwan Moon

Seok-Hwan Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220102603
    Abstract: Provided is a method of fabricating a semiconductor package. The method of fabricating the semiconductor package include preparing a lower element including a lower substrate, a lower electrode, an UBM layer, and a reducing agent layer, providing an upper element including an upper substrate, an upper electrode, and a solder bump layer, providing a pressing member on the upper substrate to press the upper substrate to the lower substrate, and providing a laser beam passing through the pressing member to bond the upper element to the lower element.
    Type: Application
    Filed: August 11, 2021
    Publication date: March 31, 2022
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Seong CHOI, Yong Sung EOM, Jiho JOO, Gwang-Mun CHOI, Seok-Hwan MOON, Chanmi LEE, Ki Seok JANG
  • Publication number: 20210358885
    Abstract: Provides is a laser bonding method. The method includes forming a bonding part on a substrate; aligning a bonding target on the bonding part and bonding the bonding part and the bonding target. The bonding includes heating the bonding part using a laser. The bonding part formed on the substrate includes an adhesive layer and a conductive particle located in the adhesive layer.
    Type: Application
    Filed: July 28, 2021
    Publication date: November 18, 2021
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Seong CHOI, Yong Sung EOM, KeonSoo JANG, Seok-Hwan MOON, Hyun-cheol BAE
  • Patent number: 11107790
    Abstract: A laser bonding method includes forming a bonding part including an adhesive layer and a conductive particle disposed within the adhesive layer on a substrate; aligning a bonding target by disposing the bonding target on a surface of the bonding part opposite the substrate; disposing a pressing part on a surface of the bonding target that is opposite to the bonding part and pressing the bonding target onto the bonding part through the pressing part; heating the bonding target by irradiating at least the pressing part with a laser and conducting heat from the pressing part to the bonding target and from the bonding target to the bonding part; and bonding together the bonding part and the bonding target by the heat conducted from the bonding target to the bonding part so that the conductive particle electrically connects the substrate and the bonding target. The pressing part may be removed.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: August 31, 2021
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kwang-Seong Choi, Yong Sung Eom, KeonSoo Jang, Seok-Hwan Moon, Hyun-cheol Bae
  • Publication number: 20210252620
    Abstract: The present disclosure relates to a transfer and bonding method using a laser. As a plurality of devices or packages are simultaneously transferred onto a substrate from a transfer tape by irradiating a top surface of the transfer tape with a first laser, and the plurality of transferred devices or packages are simultaneously bonded to pads of a substrate by irradiating a top surface of the devices or packages with a second laser, a speed of a transfer and bonding process may be extremely maximized.
    Type: Application
    Filed: February 18, 2021
    Publication date: August 19, 2021
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: KWANG-SEONG CHOI, Yong Sung EOM, Jiho JOO, Seok-Hwan MOON, Ho-Gyeong YUN, Ki Seok JANG, GWANG-MUN CHOI
  • Publication number: 20200266078
    Abstract: Provided is a method for manufacturing a semiconductor package, the method including providing a semiconductor chip on a substrate, providing a bonding member between the substrate and the semiconductor chip, and bonding the semiconductor chip on the substrate by irradiating of a laser on the substrate. Here, the bonding member may include a thermosetting resin, a curing agent, and a laser absorbing agent.
    Type: Application
    Filed: February 19, 2020
    Publication date: August 20, 2020
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Sung EOM, KWANG-SEONG CHOI, Ki Seok JANG, Seok-Hwan MOON, Jiho JOO
  • Patent number: 10636761
    Abstract: Provided is a method of fabricating a semiconductor package. The method includes preparing a package substrate having a substrate pad, and mounting a semiconductor chip on the substrate pad. Mounting the semiconductor chip includes forming a resin layer containing a solder and reducing agent granules having a first capsule layer, between a chip pad of the semiconductor chip and the substrate pad, and bonding the chip pad to the substrate pad using laser irradiated to the semiconductor chip.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: April 28, 2020
    Assignee: Electronics and Telecommunications Reearch Institute
    Inventors: Kwang-Seong Choi, Yong-Sung Eom, Keon-Soo Jang, Seok Hwan Moon, Hyun-Cheol Bae, Ieeseul Jeong, Wagno Alves Braganca Junior
  • Publication number: 20200075535
    Abstract: Provides is a laser bonding method. The method includes forming a bonding part on a substrate; aligning a bonding target on the bonding part and bonding the bonding part and the bonding target. The bonding includes heating the bonding part using a laser. The bonding part formed on the substrate includes an adhesive layer and a conductive particle located in the adhesive layer.
    Type: Application
    Filed: August 29, 2019
    Publication date: March 5, 2020
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kwang-Seong CHOI, Yong Sung EOM, KeonSoo JANG, Seok-Hwan MOON, Hyun-cheol BAE
  • Publication number: 20190287870
    Abstract: The inventive concept relates to a filling composition for a semiconductor package. The filling composition for a semiconductor package may include a resin, a curing agent, and an insulating filler. The insulating filler may include a first filler body part, a second filler body part, a polymer chain coupled to the first filler body part and the second filler body part, and supramolecules coupled to the polymer chain.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 19, 2019
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: KeonSoo JANG, Yong Sung EOM, KWANG-SEONG CHOI, Seok-Hwan MOON, Hyun-cheol BAE
  • Publication number: 20190211231
    Abstract: Provided are an adhesive film, and a method of fabricating a semiconductor package using the same. The adhesive film includes a thermoplastic resin containing a hydroxyl group, a thermosetting resin, and an anhydride.
    Type: Application
    Filed: December 14, 2018
    Publication date: July 11, 2019
    Inventors: KeonSoo JANG, Yong Sung EOM, Kwang-Seong CHOI, Seok-Hwan MOON, Hyun-cheol BAE
  • Publication number: 20190067235
    Abstract: Provided is a method of fabricating a semiconductor package. The method includes preparing a package substrate having a substrate pad, and mounting a semiconductor chip on the substrate pad. Mounting the semiconductor chip includes forming a resin layer containing a solder and reducing agent granules having a first capsule layer, between a chip pad of the semiconductor chip and the substrate pad, and bonding the chip pad to the substrate pad using laser irradiated to the semiconductor chip.
    Type: Application
    Filed: August 28, 2018
    Publication date: February 28, 2019
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kwang-Seong CHOI, Yong-Sung Eom, Keon-Soo Jang, Seok Hwan Moon, Hyun-Cheol Bae, leeseul Jeong, Wagno Alves Braganca Junior
  • Patent number: 10020201
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: July 10, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon Jun, Sang Choon Ko, Seok-Hwan Moon, Woojin Chang, Sung-Bum Bae, Young Rak Park, Je Ho Na, Jae Kyoung Mun, Eun Soo Nam
  • Publication number: 20160225631
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.
    Type: Application
    Filed: April 8, 2016
    Publication date: August 4, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon JUN, Sang Choon KO, Seok-Hwan MOON, Woojin CHANG, Sung-Bum BAE, Young Rak PARK, Je Ho NA, Jae Kyoung MUN, Eun Soo NAM
  • Patent number: 9337121
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: May 10, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon Jun, Sang Choon Ko, Seok-Hwan Moon, Woojin Chang, Sung-Bum Bae, Young Rak Park, Je Ho Na, Jae Kyoung Mun, Eun Soo Nam
  • Patent number: 9296205
    Abstract: Provided are a large-area nano-scale active printing device, a fabricating method of the same, and a printing method using the same. The printing device may include a substrate, first interconnection lines extending along a first direction, on the substrate, an interlayered dielectric layer provided on the first interconnection lines to have holes partially exposing the first interconnection lines, second interconnection lines provided adjacent to the holes in the interlayered dielectric layer to cross the first interconnection lines, and wedge-shaped electrodes provided at intersections with the first and second interconnection lines and connected to the first interconnection lines. The wedge-shaped electrodes protrude upward at centers of the holes.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: March 29, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk Yang, In-Kyu You, Soon-Won Jung, Bock Soon Na, Seok-Hwan Moon
  • Publication number: 20150348802
    Abstract: A method for fabricating a thinned flat plate heat pipe, including forming a body part having a flat plate shape by using an extrusion process, forming a through-hole in the longitudinal direction of the body part, and forming one or more grooves on at least one side of an inner wall of the through-hole to allow a working fluid to flow.
    Type: Application
    Filed: August 13, 2015
    Publication date: December 3, 2015
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Seok Hwan MOON
  • Patent number: 9179577
    Abstract: Disclosed are a flat heat pipe which has a structure integrated with a heat sink, and a facilitated fabrication method thereof. The flat heat pipe includes: a flat body portion including a plurality of heat sink fins formed on an outer surface thereof, and a plurality of through-holes formed therein and being separated by at least one separation film; and at least one groove formed in at least one surface from among a top surface and a bottom surface of one side portion of each of the plurality of through-holes.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: November 3, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Seok Hwan Moon
  • Patent number: 9159583
    Abstract: Provided is a method of manufacturing a nitride semiconductor device. The method includes forming a plurality of electrodes on a growth substrate on which first and second nitride semiconductor layers are sequentially stacked, forming upper metal layers on the plurality of electrodes respectively, removing the growth substrate to expose a lower surface of the first nitride semiconductor layer, and forming a third nitride semiconductor layer and a lower metal layer sequentially on the exposed lower surface of the first nitride semiconductor layer.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: October 13, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sang Choon Ko, Jae Kyoung Mun, Woojin Chang, Sung-Bum Bae, Young Rak Park, Chi Hoon Jun, Seok-Hwan Moon, Woo-Young Jang, Jeong-Jin Kim, Hyungyu Jang, Je Ho Na, Eun Soo Nam
  • Publication number: 20150273833
    Abstract: Provided are a large-area nano-scale active printing device, a fabricating method of the same, and a printing method using the same. The printing device may include a substrate, first interconnection lines extending along a first direction, on the substrate, an interlayered dielectric layer provided on the first interconnection lines to have holes partially exposing the first interconnection lines, second interconnection lines provided adjacent to the holes in the interlayered dielectric layer to cross the first interconnection lines, and wedge-shaped electrodes provided at intersections with the first and second interconnection lines and connected to the first interconnection lines. The wedge-shaped electrodes protrude upward at centers of the holes.
    Type: Application
    Filed: June 12, 2015
    Publication date: October 1, 2015
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk YANG, In-Kyu YOU, Soon-Won JUNG, Bock Soon NA, Seok-Hwan MOON
  • Publication number: 20150280041
    Abstract: The present invention relates to a concentrated photovoltaic module and, more particularly, to a concentrated photovoltaic module that is capable of efficiently dissipating the heat generated in a solar cell to the atmosphere. The concentrated photovoltaic module according to the present invention includes: a concentrated lens array module having at least one condenser lens; a solar cell positioned at the lower end of the condenser lens; a substrate positioned at the lower end of the solar cell and supplied with the heat generated in the solar cell; a flat plate-type heat pipe positioned at the lower end of the substrate; a flat plate-type heat sink positioned at the lower end of the flat plate-type heat pipe; and a condenser lens array structure fixing the condenser lens array module to the substrate.
    Type: Application
    Filed: September 17, 2013
    Publication date: October 1, 2015
    Applicants: KOREA ELECTRONICS TECHNOLOGY INSTITUTE, ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyung Man Lee, Seok Hwan Moon
  • Patent number: 9085140
    Abstract: Provided are a large-area nano-scale active printing device, a fabricating method of the same, and a printing method using the same. The printing device may include a substrate, first interconnection lines extending along a first direction, on the substrate, an interlayered dielectric layer provided on the first interconnection lines to have holes partially exposing the first interconnection lines, second interconnection lines provided adjacent to the holes in the interlayered dielectric layer to cross the first interconnection lines, and wedge-shaped electrodes provided at intersections with the first and second interconnection lines and connected to the first interconnection lines. The wedge-shaped electrodes protrude upward at centers of the holes.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: July 21, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk Yang, In-Kyu You, Soon-Won Jung, Bock Soon Na, Seok-Hwan Moon