Abstract: An operating method of an extreme ultraviolet (EUV) lithography device includes defining a target image to render an illumination system, assigning priorities to respective positions of facets of a pupil facet mirror corresponding to the target image, assigning a mirror according to the assigned priorities using linear programming, generating the illumination system by selecting one of the facets of the pupil facet mirror based on a symmetry criterion, and converting mirror assignment information and source map information corresponding to the selected facet into a form recognizable by an EUV scanner.

Abstract: An operating method of an extreme ultraviolet (EUV) lithography device includes defining a target image to render an illumination system, assigning priorities to respective positions of facets of a pupil facet mirror corresponding to the target image, assigning a mirror according to the assigned priorities using linear programming, generating the illumination system by selecting one of the facets of the pupil facet mirror based on a symmetry criterion, and converting mirror assignment information and source map information corresponding to the selected facet into a form recognizable by an EUV scanner.

Abstract: An EUV photomask may include a multi-layered structure on a substrate, a capping layer on the multi-layered structure, and an absorber on the capping layer. The absorber may include a first sidewall and a second sidewall. The first sidewall may extend from an upper surface of the capping layer in a vertical direction substantially perpendicular to an upper surface of the substrate, and may be a flat plane. The second sidewall may extend from the first sidewall in the vertical direction, and may be a curved surface.

Abstract: An EUV photomask may include a multi-layered structure on a substrate, a capping layer on the multi-layered structure, and an absorber on the capping layer. The absorber may include a first sidewall and a second sidewall. The first sidewall may extend from an upper surface of the capping layer in a vertical direction substantially perpendicular to an upper surface of the substrate, and may be a flat plane. The second sidewall may extend from the first sidewall in the vertical direction, and may be a curved surface.

Abstract: A semiconductor device has a semiconductor die with a solder bump formed on its surface. A contact pad is formed on a substrate. A signal trace is formed on the substrate. The pitch between the contact pad and signal trace is less than 150 micrometers. An electroless surface treatment is formed over the contact pad. The electroless surface treatment can include tin, ENIG, or OSP. A film layer is formed over the contact pad with an opening over the signal trace. An oxide layer is formed over the signal trace. The film layer and surface treatment prevent formation of the oxide layer over the contact pad. The film layer is removed. The solder bump is reflowed to metallurgically and electrically bond to the contact pad. In the event that the solder bump physically contacts the oxide layer, the oxide layer maintains electrical isolation between the solder bump and signal trace.

Abstract: A semiconductor device has a semiconductor die with a solder bump formed on its surface. A contact pad is formed on a substrate. A signal trace is formed on the substrate. The pitch between the contact pad and signal trace is less than 150 micrometers. An electroless surface treatment is formed over the contact pad. The electroless surface treatment can include tin, ENIG, or OSP. A film layer is formed over the contact pad with an opening over the signal trace. An oxide layer is formed over the signal trace. The film layer and surface treatment prevent formation of the oxide layer over the contact pad. The film layer is removed. The solder bump is reflowed to metallurgically and electrically bond to the contact pad. In the event that the solder bump physically contacts the oxide layer, the oxide layer maintains electrical isolation between the solder bump and signal trace.