Abstract: The present invention provides a merchandise sales service device based on dynamic scene change, a merchandise sales system based on dynamic scene change, a method for selling merchandise based on dynamic scene change, and a non-transitory computer readable storage medium having computer program recorded thereon. That is, it is possible to transmit information about a commodity and image information of the commodity to user equipment by efficiently configuring images and dynamically changing the images in a commodity purchase procedure. Accordingly, a user can acquire detailed information about a commodity and carefully purchase the commodity, similar to actually purchasing the commodity at an offline store. Further, it is possible to reduce the rate of returning of purchased commodities for the seller of the commodities.

Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a lower fin that protrudes from a substrate and extends in a first direction, an oxide film the lower fin, an upper fin that protrudes from the oxide film and that is spaced apart from the lower fin at a position corresponding to the lower fin, and a gate structure the upper fin that extends in a second direction to intersect the upper fin, wherein germanium (Ge) is included in a portion of the oxide film located between the lower fin and the upper fin.

Abstract: Provided is a pharmaceutical formulation comprising a modified IL-7 protein. More particularly, it comprises (a) a modified IL-7 fusion protein; (b) a basal buffer with a concentration of 10 to 50 mM; (c) a sugar with a concentration of 2.5 to 5 w/v %; and (d) a surfactant with a concentration of 0.05 to 6 w/v %. Such pharmaceutical formulation of a modified IL-7 fusion protein does not show aggregates formation, but shows protective effects on proteins under stress conditions such as oxidation or agitation, and thus can effectively be used for the treatment of a patient.

Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a lower fin that protrudes from a substrate and extends in a first direction, an oxide film the lower fin, an upper fin that protrudes from the oxide film and that is spaced apart from the lower fin at a position corresponding to the lower fin, and a gate structure the upper fin that extends in a second direction to intersect the upper fin, wherein germanium (Ge) is included in a portion of the oxide film located between the lower fin and the upper fin.

Abstract: A semiconductor device includes a gate insulating layer disposed on a substrate, a first work function tuning layer disposed on the gate insulating layer, a lower barrier conductive layer on and in contact with the first work function tuning layer, and an upper barrier conductive layer on and in contact with the lower barrier conductive layer. The upper barrier conductive layer and the lower barrier conductive layer include a material in common, e.g., they may each include a titanium nitride (TiN) layer.

Abstract: A semiconductor device is provided including a fin active region on a substrate. The fin active region includes a lower region, a middle region, and an upper region. The middle region has lateral surfaces with a slope less steep than the lateral surfaces of the upper region. An isolation region is on a lateral surface of the lower region of the fin active region. A gate electrode structure is provided. A gate dielectric structure having an oxidation oxide layer and a deposition oxide layer, while having a thickness greater than half a width of the upper region of the fin active region is provided. The deposition oxide layer is between the gate electrode structure and the fin active region and the gate electrode structure and the isolation region, and the oxidation oxide layer is between the fin active region and the deposition oxide layer.

Abstract: A method and apparatus for generating a test bench for verifying a processor decoder are provided. The method including receiving an architecture description comprising processor decoder information, parsing the received architecture description into information for verifying the processor decoder, and generating the test bench to verify the processor decoder based on the parsed information.

Abstract: A cache memory and a method of managing the same are provided. The method of managing a cache memory includes determining whether a number of bits of a data bandwidth stored in a bank is an integer multiple of a number of bits of unit data in data to be stored, storing first unit data, among the data to be stored, in a first region of a first address in the bank in response to the number of bits of the data bandwidth not being the integer multiple of the number of bits of the unit data, and storing part of second unit data, among the data to be stored, in a second region of the first address.

Abstract: A method of transmitting a control signal using efficient multiplexing is disclosed. The present invention includes the steps of multiplexing a plurality of 1-bit control signals within a prescribed time-frequency domain by code division multiple access (CDMA) and transmitting the multiplexed control signals, wherein a plurality of the 1-hit control signals include a plurality of the 1-bit control signals for a specific transmitting side. Accordingly, reliability on 1-bit control signal transmission can be enhanced.

Abstract: An apparatus for generating a test case includes a constrained description generator configured to define a plurality of constrained verification spaces in a total verification space, and generate a constrained description for each of the plurality of constrained verification spaces; and a test case generator configured to generate a test case using the constrained description.

Abstract: A semiconductor device is provided including a fin active region on a substrate. The fin active region includes a lower region, a middle region, and an upper region. The middle region has lateral surfaces with a slope less steep than the lateral surfaces of the upper region. An isolation region is on a lateral surface of the lower region of the fin active region. A gate electrode structure is provided. A gate dielectric structure having an oxidation oxide layer and a deposition oxide layer, while having a thickness greater than half a width of the upper region of the fin active region is provided. The deposition oxide layer is between the gate electrode structure and the fin active region and the gate electrode structure and the isolation region, and the oxidation oxide layer is between the fin active region and the deposition oxide layer.

Abstract: A method and apparatus for generating a test bench for verifying a processor decoder are provided. The method including receiving an architecture description comprising processor decoder information, parsing the received architecture description into information for verifying the processor decoder, and generating the test bench to verify the processor decoder based on the parsed information.

Abstract: A method of transmitting a control signal using efficient multiplexing is disclosed. The present invention includes the steps of multiplexing a plurality of 1-bit control signals within a prescribed time-frequency domain by code division multiple access (CDMA) and transmitting the multiplexed control signals, wherein a plurality of the 1-hit control signals include a plurality of the 1-bit control signals for a specific transmitting side. Accordingly, reliability on 1-bit control signal transmission can be enhanced.

Abstract: A method and apparatus for generating a test bench for verifying a processor decoder are provided. The method including receiving an architecture description comprising processor decoder information, parsing the received architecture description into information for verifying the processor decoder, and generating the test bench to verify the processor decoder based on the parsed information.

Abstract: A method of transmitting a control signal using efficient multiplexing is disclosed. The present invention includes the steps of multiplexing a plurality of 1-bit control signals within a prescribed time-frequency domain by code division multiple access (CDMA) and transmitting the multiplexed control signals, wherein a plurality of the 1-bit control signals include a plurality of the 1-bit control signals for a specific transmitting side. Accordingly, reliability on 1-bit control signal transmission can be enhanced.

Abstract: The present invention provides a PEGylated IFN-? variant and a composition for preventing or treating hyperproliferative diseases, inflammatory diseases, autoimmune diseases or viral infectious diseases, the composition comprising the PEGylated IFN-? variant as an effective ingredient. The PEGylated IFN-? variant of the present invention has an excellent anti-viral efficacy, immune regulatory function and anti-cell growth efficacy by virtue of better pharmacokinetic properties compared to native IFN-? and non-PEGylated IFN-? variants, and therefore can be used usefully against various diseases. The present invention provides good patient convenience in terms of administration due to exhibition of an excellent pharmacological activity effect upon administration and a significant increase of half-life in blood over existing interferon formulations.

Abstract: Provided is a method of processing a texture. The method includes acquiring texture position information in a texture image corresponding to pixel position information of pixels constituting a frame, acquiring texture classification information (TCI) representing a similarity between respective texture factors of two or more classified regions in the texture image based on the texture position information, determining an amount of texture data requested from a memory according to the TCI, and reading texture data corresponding to the determined amount of texture data based on the texture position information.

Abstract: Disclosed is an operating panel device for a machining center having a length in a first direction and a width in a second direction. The operating panel device includes an operating interface having a panel that communicates with the machining center and a panel support that supports and secures the panel, a linear transfer arranged at a longitudinal side of the machining center and extending in the first direction, and a rotating coupler coupling the operating interface to the linear transfer and conducting a linear motion along the first direction and a rotating motion with respect to a third direction perpendicular to the first and the second directions such that the operating interface is selectively positioned at one of the longitudinal side and a latitudinal side of the machining center.

Abstract: A method of transmitting a control signal using efficient multiplexing is disclosed. The present invention includes the steps of multiplexing a plurality of 1-bit control signals within a prescribed time-frequency domain by code division multiple access (CDMA) and transmitting the multiplexed control signals, wherein a plurality of the 1-hit control signals include a plurality of the 1-bit control signals for a specific transmitting side. Accordingly, reliability on 1-bit control signal transmission can be enhanced.

Abstract: A method of transmitting a control signal using efficient multiplexing is disclosed. The present invention includes the steps of multiplexing a plurality of 1-bit control signals within a prescribed time-frequency domain by code division multiple access (CDMA) and transmitting the multiplexed control signals, wherein a plurality of the 1-hit control signals include a plurality of the 1-bit control signals for a specific transmitting side. Accordingly, reliability on 1-bit control signal transmission can be enhanced.