Abstract: An apparatus for welding a secondary battery electrode assembly is disclosed. The electrode assembly may have negative electrodes alternatingly interleaved with positive electrodes. The apparatus may be configured to weld a plurality of non-coated electrode tabs using a sonotrode horn, each of the tabs extending from a respective one of the electrodes having a first same polarity. The sonotrode horn may include a vibration-applying plate and a horn pattern region having a protrusion-type unit pitch pattern disposed on the vibration-applying plate. A radius of curvature of a side surface of the protrusion-type unit pitch pattern disposed at an outer edge of the horn pattern region may be directly proportional to a number of the non-coated electrode tabs. A tip sharpness of the protrusion-type unit pitch pattern disposed at an outer edge of the horn pattern region may be inversely proportional to a number of the non-coated electrode tabs.

Abstract: Disclosed herein are an electrode having improved electrode tab welding characteristics configured such that one or more non-coated electrode tabs are provided for a plurality of stacked electrodes having the same polarity in order to maintain welding safety in the case in which the number of electrode layers that are stacked is increased in order to achieve high output and capacity, and a secondary battery including the same. Consequently, it is possible to prevent a plurality of electrode tabs from being cut at the time of welding the electrode tabs. In addition, the lower end of an electrode lead that is welded to non-coated electrode tabs provided for a plurality of stacked electrodes having the same polarity is punched so as to correspond to the non-coated electrode tabs. Consequently, it is possible to improve flexibility for a step formed in the secondary battery electrode.

Abstract: An integrated circuit includes: a phase-shifted data signal generation circuit configured to generate a plurality of phase-shifted data signals from an input data signal based on at least one phase-shifted clock signal; a synchronization circuit configured to generate a plurality of synchronization data signals by applying the at least one phase-shifted clock signal to the plurality of phase-shifted data signals provided by the phase-shifted data signal generation circuit; and a control signal generation circuit configured to perform logic operations on the plurality of synchronization data signals to generate a phase control signal for controlling a phase of the at least one phase-shifted clock signal, and generate a frequency control signal for controlling a frequency of the at least one phase-shifted clock signal.

Abstract: Disclosed herein are an electrode having improved electrode tab welding characteristics configured such that one or more non-coated electrode tabs are provided for a plurality of stacked electrodes having the same polarity in order to maintain welding safety in the case in which the number of electrode layers that are stacked is increased in order to achieve high output and capacity, and a secondary battery including the same. Consequently, it is possible to prevent a plurality of electrode tabs from being cut at the time of welding the electrode tabs. In addition, the lower end of an electrode lead that is welded to non-coated electrode tabs provided for a plurality of stacked electrodes having the same polarity is punched so as to correspond to the non-coated electrode tabs. Consequently, it is possible to improve flexibility for a step formed in the secondary battery electrode.

Abstract: An integrated circuit includes: a phase-shifted data signal generation circuit configured to generate a plurality of phase-shifted data signals from an input data signal based on at least one phase-shifted clock signal; a synchronization circuit configured to generate a plurality of synchronization data signals by applying the at least one phase-shifted clock signal to the plurality of phase-shifted data signals provided by the phase-shifted data signal generation circuit; and a control signal generation circuit configured to perform logic operations on the plurality of synchronization data signals to generate a phase control signal for controlling a phase of the at least one phase-shifted clock signal, and generate a frequency control signal for controlling a frequency of the at least one phase-shifted clock signal.