Patents by Inventor Sergey Voronin

Sergey Voronin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120181
    Abstract: A method of plasma processing includes delivering direct current voltage to a substrate holder including an upper side configured to support a substrate disposed within a plasma processing chamber. The upper side is divided into a plurality of zones by a plurality of conductors electrically isolated from each other. The method further includes pulsing the direct current voltage as first direct current pulses to a first conductor of the plurality of conductors using first pulse parameters, and pulsing the direct current voltage as second direct current pulses to a second conductor of the plurality of conductors using second pulse parameters that are different from the first pulse parameters. The direct current voltage is pulsed to the second conductor while pulsing the direct current voltage to the first conductor.
    Type: Application
    Filed: October 6, 2022
    Publication date: April 11, 2024
    Inventors: Sergey Voronin, Qi Wang
  • Publication number: 20240096600
    Abstract: A method of plasma processing includes generating plasma by coupling a source power pulse to a plasma processing chamber containing a substrate holder configured to support a substrate. The plasma includes first ions having a first mass and second ions having a second mass greater than the first mass. The ion density ratio of the second ions to the first ions is a first ratio. The method further includes delivering an energetic ion flux of second ions to the substrate by applying a delayed bias power pulse to the substrate holder after a delay between the source power pulse and the delayed bias power pulse. The delay is chosen based on the diffusion time constants of the first ions and the second ions so that the ion density ratio of the second ions to the first ions is a second ratio that is greater than the first ratio.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 21, 2024
    Inventors: Sergey Voronin, Qi Wang, Hamed Hajibabaeinajafabadi
  • Publication number: 20240094056
    Abstract: A method of characterizing a plasma in a plasma processing system that includes: generating a pulsed plasma in a plasma processing chamber of the plasma processing system, the pulsed plasma being powered with a pulsed power signal, each pulse of the pulsed plasma including three periods: a overshoot period, a stable-ON period, and a decay period; performing cyclic optical emission spectroscopy (OES) measurements for the pulsed plasma, the cyclic OES measurements including: obtaining first OES data during one of the three periods from more than one pulses of the pulsed plasma; and obtaining a characteristic of the pulsed plasma for the one of the three periods based only on the first OES data.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Inventors: Sergey Voronin, Blaze Messer, Yan Chen, Joel Ng, Ashawaraya Shalini, Ying Zhu, Da Song
  • Publication number: 20240053684
    Abstract: A method of processing a substrate includes receiving a substrate including a photoresist film including exposed and unexposed portions, etching parts of the unexposed portions of the photoresist film with a developing gas in a process chamber to leave a residual part of the unexposed portions, and purging the developing gas from the process chamber with a purging gas. After purging the developing gas, the residual part of the unexposed portions is etched with the developing gas. The substrate is etched using exposed portions of the photoresist film as a mask.
    Type: Application
    Filed: August 15, 2022
    Publication date: February 15, 2024
    Inventors: Hamed Hajibabaeinajafabadi, Akiteru Ko, Yu-Hao Tsai, Sergey Voronin
  • Publication number: 20230317465
    Abstract: A method of processing a substrate that includes: positioning a substrate in a plasma processing chamber, the substrate including a layer stack of alternating layers of silicon (Si) layers and silicon-germanium (SiGe) layers, the substrate including a recess that exposes sidewalls of the Si layers and sidewalls of the SiGe layers; flowing a first process gas into the plasma processing chamber; while flowing the first process gas, pulsing a second process gas into the plasma processing chamber at a pulsing frequency; while flowing the first process gas and pulsing the second process gas, applying power to a source electrode and a bias electrode of the plasma processing chamber to generate a plasma in the plasma processing chamber; and exposing the substrate to the plasma to laterally etch a portion of the Si layers selectively to the SiGe layers and form indents between the SiGe layers.
    Type: Application
    Filed: April 5, 2022
    Publication date: October 5, 2023
    Inventors: Hamed Hajibabaeinajafabadi, Pingshan Luan, Aelan Mosden, Sergey Voronin
  • Patent number: 11699741
    Abstract: In an example, a method includes depositing a first sidewall spacer layer over a substrate having a layer stack including alternating layers of a nanosheet and a sacrificial layer, and a dummy gate formed over the layer stack, the first sidewall spacer layer formed over the dummy gate. The method includes depositing a metal-containing liner over the first sidewall spacer layer; forming a first sidewall spacer along the dummy gate by anisotropically etching the metal-containing liner and the first sidewall spacer layer; performing an anisotropic etch back process to form a plurality of vertical recesses in the layer stack; laterally etching the layer stack and form a plurality of lateral recesses between adjacent nanosheets; depositing a second sidewall spacer layer to fill the plurality of lateral recesses; and etching a portion of the second sidewall spacer layer to expose tips of the nanosheet layers.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: July 11, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Yusuke Yoshida, Sergey Voronin, Christopher Talone, Alok Ranjan
  • Patent number: 11651970
    Abstract: Differences in ion mass of lighter ions (having a higher mobility) and heavier ions are utilized in conjunction with bias voltage modulation of an atomic layer etch (ALE) to provide a fast ALE process. The difference in ion mobility achieves surface modification with reactive neutral species in the absence of a bias voltage, and ion bombardment with lighter ions (e.g., inert or less reactive ions) in the presence of a bias voltage. By modulating the bias voltage, preferential ion bombardment is achieved with lighter ions without the need to physically separate or purge the reactive precursors and inert gases supplied to the process chamber for a given ALE cycle. A “fast” plasma ALE process is provided which improves etch rate, throughput and cost-efficiency by enabling the same gas chemistry composition (e.g., reactive precursor and inert gas combination) to be kept in the process chamber during a given ALE cycle.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: May 16, 2023
    Assignee: Tokyo Electron Limited
    Inventor: Sergey Voronin
  • Patent number: 11637242
    Abstract: The performance of a ReRAM structure may be stabilized by utilizing a dry chemical gas removal (or cleaning) process to remove sidewall residue and/or etch by-products after etching the ReRAM stack layers. The dry chemical gas removal process decreases undesirable changes in the ReRAM forming voltage that may result from such sidewall residue and/or etch by-products. Specifically, the dry chemical gas removal process may reduce the ReRAM forming voltage that may otherwise result in a ReRAM structure that has the sidewall residue and/or etch by-products. In one embodiment, the dry chemical gas removal process may comprise utilizing a combination of HF and NH3 gases. The dry chemical gas removal process utilizing HF and NH3 gases may be particularly suited for removing halogen containing sidewall residue and/or etch by-products.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: April 25, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Sergey Voronin, Qi Wang, Shyam Sridhar, Karsten Beckmann, Martin Rodgers, Nathaniel Cady
  • Publication number: 20230108117
    Abstract: A method of etching a metal includes performing at least two cycles of an etch process. A cycle of the etch process includes: performing a surface modification on an exposed surface of a metal layer over a substrate, performing a hydrogen treatment on the metal layer, and performing a cleaning treatment on the metal layer. The hydrogen treatment forms a layer of reaction products on the metal layer. The cleaning treatment removes the layer of reaction products.
    Type: Application
    Filed: October 4, 2022
    Publication date: April 6, 2023
    Inventors: Sergey Voronin, Qi Wang, Christopher Netzband, Gabriel Gibney, Sang Cheol Han, Peter Biolsi, Arkalgud Sitaram, Christophe Vallee
  • Publication number: 20220384607
    Abstract: In an example, a method includes depositing a first sidewall spacer layer over a substrate having a layer stack including alternating layers of a nanosheet and a sacrificial layer, and a dummy gate formed over the layer stack, the first sidewall spacer layer formed over the dummy gate. The method includes depositing a metal-containing liner over the first sidewall spacer layer; forming a first sidewall spacer along the dummy gate by anisotropically etching the metal-containing liner and the first sidewall spacer layer; performing an anisotropic etch back process to form a plurality of vertical recesses in the layer stack; laterally etching the layer stack and form a plurality of lateral recesses between adjacent nanosheets; depositing a second sidewall spacer layer to fill the plurality of lateral recesses; and etching a portion of the second sidewall spacer layer to expose tips of the nanosheet layers.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 1, 2022
    Inventors: Yusuke Yoshida, Sergey Voronin, Christopher Talone, Alok Ranjan
  • Patent number: 11398386
    Abstract: In one example, a method of processing a substrate includes receiving a substrate in a processing chamber, the substrate having an etch mask positioned over an underlying layer to be etched, where the underlying layer is a silicon-containing layer. The method includes executing a first etch process that includes forming a first plasma from a first process gas that includes hydrogen bromide or chlorine and etching the underlying layer using products of the first plasma. The method includes executing a second etch process that includes forming a second plasma from a second process gas that includes fluorine and etching the substrate using products from the second plasma. The method may include alternating between the first etch process and the second etch process.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: July 26, 2022
    Assignee: Tokyo Electron Limited
    Inventors: Yusuke Yoshida, Sergey Voronin, Shyam Sridhar, Caitlin Philippi, Christopher Talone, Alok Ranjan
  • Publication number: 20220059765
    Abstract: The performance of a ReRAM structure may be stabilized by utilizing a dry chemical gas removal (or cleaning) process to remove sidewall residue and/or etch by-products after etching the ReRAM stack layers. The dry chemical gas removal process decreases undesirable changes in the ReRAM forming voltage that may result from such sidewall residue and/or etch by-products. Specifically, the dry chemical gas removal process may reduce the ReRAM forming voltage that may otherwise result in a ReRAM structure that has the sidewall residue and/or etch by-products. In one embodiment, the dry chemical gas removal process may comprise utilizing a combination of HF and NH3 gases. The dry chemical gas removal process utilizing HF and NH3 gases may be particularly suited for removing halogen containing sidewall residue and/or etch by-products.
    Type: Application
    Filed: August 21, 2020
    Publication date: February 24, 2022
    Inventors: Sergey Voronin, Qi Wang, Shyam Sridhar, Karsten Beckmann, Martin Rodgers, Nathaniel Cady
  • Publication number: 20220051875
    Abstract: A plasma processing apparatus includes a plasma processing chamber configured to contain a plasma comprising a plasma sheath, ions of a first species, and ions of a second species, a substrate disposed in the plasma processing chamber, and a short pulse generator coupled to the substrate, the short pulse generator configured to generate a pulse train of negative bias pulses. Each of the negative bias pulses has a pulse duration less than 10 ?s. A pulse delay between successive negative bias pulses is at least five times the pulse duration. The first species has a first mass and the second species has a second mass less than the first mass. The pulse train spatially stratifies the ions of the first species and the ions of the second species in the plasma sheath.
    Type: Application
    Filed: October 27, 2021
    Publication date: February 17, 2022
    Inventor: Sergey Voronin
  • Patent number: 11189462
    Abstract: A method of plasma processing includes generating plasma in a plasma processing chamber containing a first species, a second species, and a substrate. The plasma includes a plasma sheath, first species ions, and second species ions. The first species has a first mass and the second species has a second mass that is less than the first mass. The method further includes applying a pulse train of negative bias pulses to the substrate. Each of the negative bias pulses has a pulse duration less than 10 ?s and spatially stratifies the first species ions and the second species ions in the plasma sheath. No bias voltage is applied to the substrate during a pulse delay after each negative bias pulse. The pulse delay is at least five times the pulse duration.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: November 30, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Sergey Voronin
  • Publication number: 20210366723
    Abstract: Differences in ion mass of lighter ions (having a higher mobility) and heavier ions are utilized in conjunction with bias voltage modulation of an atomic layer etch (ALE) to provide a fast ALE process. The difference in ion mobility achieves surface modification with reactive neutral species in the absence of a bias voltage, and ion bombardment with lighter ions (e.g., inert or less reactive ions) in the presence of a bias voltage. By modulating the bias voltage, preferential ion bombardment is achieved with lighter ions without the need to physically separate or purge the reactive precursors and inert gases supplied to the process chamber for a given ALE cycle. A “fast” plasma ALE process is provided which improves etch rate, throughput and cost-efficiency by enabling the same gas chemistry composition (e.g., reactive precursor and inert gas combination) to be kept in the process chamber during a given ALE cycle.
    Type: Application
    Filed: May 7, 2021
    Publication date: November 25, 2021
    Inventor: Sergey Voronin
  • Patent number: 11133194
    Abstract: A method of etching a substrate includes generating plasma comprising a first concentration of an etchant and a second concentration of an inhibitor and etching the substrate by exposing an exposed interface between a first material and a second material to the plasma. The first material includes a lower reactivity to both the etchant and the inhibitor than the second material. The first concentration is less than the second concentration. Etching the substrate includes etching the first material and the second material at the exposed interface to form an etched indentation including an enriched region of the second material, forming a passivation layer at the enriched region using the inhibitor, and etching the first material at the etched indentation. The passivation layer reduces an etch rate of the second material to a reduced rate that is less than an etch rate of the first material.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: September 28, 2021
    Assignee: Tokyo Electron Limited
    Inventors: Sergey Voronin, Christopher Catano, Nicholas Joy, Alok Ranjan, Christopher Talone
  • Patent number: 10998170
    Abstract: Plasma ion energy distribution for ions having different masses is controlled by controlling the relationship between a base RF frequency and a harmonic RF frequency. By the controlling the RF power frequencies, characteristics of the plasma process may be changed based on ion mass. The ions that dominate etching may be selectively based upon whether an ion is lighter or heavier than other ions. Similarly, atomic layer etch processes may be controlled such that the process may be switched between a layer modification step and a layer etch step though adjustment of the RF frequencies. Such switching is capable of being performed within the same gas phase of the plasma process. The control of the RF power includes controlling the phase difference and/or amplitude ratios between a base RF frequency and a harmonic frequency based upon the detection of one or more electrical characteristics within the plasma apparatus.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: May 4, 2021
    Assignee: Tokyo Electron Limited
    Inventors: Yusuke Yoshida, Sergey Voronin, Alok Ranjan, David J. Coumou, Scott E. White
  • Patent number: 10903077
    Abstract: Embodiments are described herein that form silicon germanium nano-wires while reducing or eliminating erosion of nitride layers (e.g., masks and spacers) caused during selective etching of silicon with respect to silicon germanium during formation of silicon germanium nano-wires. oxide layers are used to protect nitride layers during formation of silicon germanium (SiGe) nano-wires. In particular, multilayer spacers including oxide/nitride/oxide layers are formed to protect the nitride layers during selective silicon etch processes that are used to form silicon germanium nano-wires, for example, for field effect transistors (FETs). The multilayer spacers allow for target levels of erosion to be achieved for the nitride layers.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yusuke Yoshida, Christopher Catano, Christopher Talone, Nicholas Joy, Sergey Voronin
  • Patent number: 10818482
    Abstract: Methods are disclosed to detect plasma light emissions during plasma processing, to analyze light intensity data associated with the plasma source, and to adjust operating parameters for the plasma source and/or the process chamber based upon light intensity distributions associated with the plasma processing. The light intensity distributions for the plasma sources and related analysis can be conducted across multiple processing tools. For some embodiments, plasma discharge stability and/or chamber-to-chamber matching information is determined based upon light intensity data, and the operation of the processing tools are adjusted or controlled based upon stability and/or matching determinations. The disclosed embodiments thereby provide simple, low-cost solutions to assess and improve plasma sources and discharge stability for plasma processing tools such as plasma etch and deposition tools.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: October 27, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yusuke Yoshida, Jason Marion, Sergey Voronin, Alok Ranjan
  • Patent number: 10818502
    Abstract: Systems and methods are disclosed for plasma discharge ignition to reduce surface particles and thereby decrease defects introduced during plasma processing. A microelectronic workpiece is positioned on a holder within a process chamber that includes a first radio frequency (RF) power source configured to couple RF power to a top portion of the process chamber, a second RF power source configured to couple RF power to the holder, and a direct current (DC) power supply. Initially, a process gas for plasma process is flowed into the process chamber. The process gas is ignited to form plasma by activating the second RF power source to apply RF power to the holder. Subsequently, the microelectronic workpiece is clamped to the holder by applying the positive voltage to the holder with the DC power supply, and the first RF power source is activated to maintain the plasma within the process chamber.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: October 27, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Sergey Voronin, Jason Marion, Yusuke Yoshida, Alok Ranjan, Takashi Enomoto, Yoshio Ishikawa