Patents by Inventor Sergio Antonio Chan Arguedas

Sergio Antonio Chan Arguedas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935799
    Abstract: Disclosed herein are integrated circuit (IC) package lids with polymer features, as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, and a die between the package substrate and the lid. A foot or rib of the lid may include a polymer material.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: March 19, 2024
    Assignee: Intel Corporation
    Inventors: Elah Bozorg-Grayeli, Taylor William Gaines, Frederick W. Atadana, Sergio Antonio Chan Arguedas, Robert F. Cheney
  • Patent number: 11894282
    Abstract: Disclosed herein are vented lids for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, and a die between the package substrate and the lid. A vent may extend between the interior surface and the exterior surface of the lid, and the vent may at least partially overlap the die.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: February 6, 2024
    Assignee: Intel Corporation
    Inventors: Zhimin Wan, Sergio Antonio Chan Arguedas, Peng Li, Chandra Mohan Jha, Aravindha R. Antoniswamy, Cheng Xu, Junnan Zhao, Ying Wang
  • Publication number: 20240006378
    Abstract: A die package comprises a substrate comprising a first face and an opposing second face, a first semiconductor die coupled to the first face of the substrate, a second semiconductor die coupled to the first face of the substrate; and a heat spreader, wherein the first semiconductor die is thermally connected to the heat spreader by a first thermal interface material and the second semiconductor die is thermally connected to the heat spreader by a second thermal interface material, wherein the first thermal interface material comprises a first composition and the second thermal interface material comprises a second composition, wherein the first composition has a lower elastic modulus than the second composition under a first specified condition or conditions.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Inventors: Sergio Antonio Chan Arguedas, Zheng Ren, Arifur Chowdhury
  • Patent number: 11817369
    Abstract: Disclosed herein are lids for integrated circuit (IC) packages with solder thermal interface materials (STIMs), as well as related methods and devices. For example, in some embodiments, an IC package may include a STIM between a die of the IC package and a lid of the IC package. The lid of the IC package may include nickel, the IC package may include an intermetallic compound (IMC) between the STIM and the nickel, and the lid may include an intermediate material between the nickel and the IMC.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: November 14, 2023
    Assignee: Intel Corporation
    Inventors: Bamidele Daniel Falola, Susmriti Das Mahapatra, Sergio Antonio Chan Arguedas, Peng Li, Amitesh Saha
  • Publication number: 20230343738
    Abstract: Embodiments may relate to a microelectronic package that includes a die coupled with a package substrate. A plurality of solder thermal interface material (STIM) thermal interconnects may be coupled with the die and an integrated heat spreader (IHS) may be coupled with the plurality of STIM thermal interconnects. A thermal underfill material may be positioned between the IHS and the die such that the thermal underfill material at least partially surrounds the plurality of STIM thermal interconnects. Other embodiments may be described or claimed.
    Type: Application
    Filed: July 3, 2023
    Publication date: October 26, 2023
    Applicant: Intel Corporation
    Inventors: Debendra Mallik, Sergio Antonio Chan Arguedas, Jimin Yao, Chandra Mohan Jha
  • Patent number: 11798861
    Abstract: Embodiments may relate to a microelectronic package that includes a lid coupled with a package substrate such that a die is positioned between the lid and the package substrate. The lid may include a heating element that is to heat an area between the lid and the die. Other embodiments may be described or claimed.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: October 24, 2023
    Assignee: Intel Corporation
    Inventors: Peng Li, Kelly P. Lofgreen, Manish Dubey, Bamidele Daniel Falola, Ken Hackenberg, Shenavia S. Howell, Sergio Antonio Chan Arguedas, Yongmei Liu, Deepak Goyal
  • Patent number: 11791237
    Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface; a die having a first surface and an opposing second surface, wherein the first surface of the die is coupled to the second surface of the package substrate; a cooling apparatus thermally coupled to the second surface of the die; and a thermal interface material (TIM) between the second surface of the die and the cooling apparatus, wherein the TIM includes an indium alloy having a liquidus temperature equal to or greater than about 245 degrees Celsius.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: October 17, 2023
    Assignee: Intel Corporation
    Inventors: Peng Li, Sergio Antonio Chan Arguedas, Yongmei Liu, Deepak Goyal, Ken Hackenberg
  • Patent number: 11735552
    Abstract: Embodiments may relate to a microelectronic package that includes a die coupled with a package substrate. A plurality of solder thermal interface material (STIM) thermal interconnects may be coupled with the die and an integrated heat spreader (IHS) may be coupled with the plurality of STIM thermal interconnects. A thermal underfill material may be positioned between the IHS and the die such that the thermal underfill material at least partially surrounds the plurality of STIM thermal interconnects. Other embodiments may be described or claimed.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: August 22, 2023
    Assignee: Intel Corporation
    Inventors: Debendra Mallik, Sergio Antonio Chan Arguedas, Jimin Yao, Chandra Mohan Jha
  • Patent number: 11682605
    Abstract: Disclosed herein are integrated circuit (IC) packages with asymmetric adhesion material regions, as well as related methods and devices. For example, in some embodiments, an IC package may include a solder thermal interface material (STIM) between a die of the IC package and a lid of the IC package. The lid of the IC package may include an adhesion material region, in contact with the STIM, that is asymmetric with respect to the die.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: June 20, 2023
    Assignee: Intel Corporation
    Inventors: Karthik Visvanathan, Shenavia S. Howell, Sergio Antonio Chan Arguedas, Peng Li
  • Publication number: 20220201889
    Abstract: A two-phase immersion cooling system for an integrated circuit assembly may be formed utilizing boiling enhancement structures formed on or directly attached to heat dissipation devices within the integrated circuit assembly, formed on or directly attached to integrated circuit devices within the integrated circuit assembly, and/or conformally formed over support devices and at least a portion of an electronic board within the integrated circuit assembly. In still a further embodiment, the two-phase immersion cooling system may include a low boiling point liquid including at least two liquids that are substantially immiscible with one another.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 23, 2022
    Applicant: Intel Corporation
    Inventors: Raanan Sover, James Williams, Bradley Smith, Nir Peled, Paul George, Jason Armstrong, Alexey Chinkov, Meir Cohen, Je-Young Chang, Kuang Liu, Ravindranath Mahajan, Kelly Lofgreen, Kyle Arrington, Michael Crocker, Sergio Antonio Chan Arguedas
  • Publication number: 20210407884
    Abstract: An integrated circuit assembly may be fabricated to include an integrated circuit device having a backside surface and a backside metallization layer on the backside surface of the integrated circuit device, wherein the backside metallization layer comprises a bond layer on the backside surface of the integrated circuit device, a high thermal conductivity layer on the bond layer, and a cap layer on the high thermal conductivity layer. The bond layer may be a layered stack comprising an adhesion promotion layer on the backside of the integrated circuit device and at one least metal layer. The high thermal conductivity layer may be an additively deposited material having a thermal conductivity greater than silicon, such as copper, silver, aluminum, diamond, silicon carbide, boron nitride, aluminum nitride, and combinations thereof.
    Type: Application
    Filed: June 25, 2020
    Publication date: December 30, 2021
    Applicant: Intel Corporation
    Inventors: Feras Eid, Xavier Brun, Paul Diglio, Joe Walczyk, Sergio Antonio Chan Arguedas
  • Publication number: 20210398871
    Abstract: A hybrid integrated heat spreader suitable for an integrated circuit (IC) die package. The hybrid integrated heat spreader includes a top sheet material and a sealant interface material located where the heat spreader is to contact an assembly substrate. The sealant interface material may offer greater adhesion to a sealant employed between the interface material and the package substrate. In some examples, the sealant interface material has a greater surface roughness and/or a different composition than a surface of the integrated heat spreader that is in close thermal contact with an IC die through a thermal interface material. With the sealant interface material improving adhesion, the sealant may have a higher bulk modulus, enabling the integrated heat spreader to impart greater stiffness to the IC die package assembly.
    Type: Application
    Filed: June 18, 2020
    Publication date: December 23, 2021
    Applicant: Intel Corporation
    Inventors: Feras Eid, Sergio Antonio Chan Arguedas, Bamidele Daniel Falola
  • Publication number: 20210028084
    Abstract: Embodiments may relate to a microelectronic package that includes a die, a thermal interface material (TIM) coupled with the die, and an integrated heat spreader (IHS) coupled with the TIM. The IHS may include a feature with a non-uniform cross-sectional profile that includes a thin point and a thick point as measured in a direction perpendicular to a face of the die to which the TIM is coupled. Other embodiments may be described or claimed.
    Type: Application
    Filed: July 22, 2019
    Publication date: January 28, 2021
    Applicant: Intel Corporation
    Inventors: Sergio Antonio Chan Arguedas, Edvin Cetegen, Baris Bicen, Aravindha R. Antoniswamy
  • Publication number: 20210020537
    Abstract: Embodiments may relate to a microelectronic package that includes a die coupled with a package substrate. A solder thermal interface material (STIM) may be coupled with the die such that the die is between the STIM and the package substrate. An integrated heat spreader (IHS) may be coupled with the STIM such that the STIM is between the IHS and the die, and the IHS may include a feature that is to control bleed-out of the STIM during STIM reflow based on surface tension of the STIM. Other embodiments may be described or claimed.
    Type: Application
    Filed: July 19, 2019
    Publication date: January 21, 2021
    Applicant: Intel Corporation
    Inventors: Sergio Antonio Chan Arguedas, Manish Dubey, Peng Li, Aravindha R. Antoniswamy, Anup Pancholi
  • Publication number: 20210013117
    Abstract: Embodiments may relate to a microelectronic package that includes a lid coupled with a package substrate such that a die is positioned between the lid and the package substrate. The lid may include a heating element that is to heat an area between the lid and the die. Other embodiments may be described or claimed.
    Type: Application
    Filed: July 8, 2019
    Publication date: January 14, 2021
    Applicant: Intel Corporation
    Inventors: Peng Li, Kelly P. Lofgreen, Manish Dubey, Bamidele Daniel Falola, Ken Hackenberg, Shenavia S. Howell, Sergio Antonio Chan Arguedas, Yongmei Liu, Deepak Goyal
  • Publication number: 20200411395
    Abstract: Disclosed herein are integrated circuit (IC) package lids with polymer features, as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, and a die between the package substrate and the lid. A foot or rib of the lid may include a polymer material.
    Type: Application
    Filed: June 25, 2019
    Publication date: December 31, 2020
    Applicant: Intel Corporation
    Inventors: Elah Bozorg-Grayeli, Taylor William Gaines, Frederick W. Atadana, Sergio Antonio Chan Arguedas, Robert F. Cheney
  • Publication number: 20200411464
    Abstract: Embodiments may relate to a microelectronic package that includes a die coupled with a package substrate. A plurality of solder thermal interface material (STIM) thermal interconnects may be coupled with the die and an integrated heat spreader (IHS) may be coupled with the plurality of STIM thermal interconnects. A thermal underfill material may be positioned between the IHS and the die such that the thermal underfill material at least partially surrounds the plurality of STIM thermal interconnects. Other embodiments may be described or claimed.
    Type: Application
    Filed: June 25, 2019
    Publication date: December 31, 2020
    Applicant: Intel Corporation
    Inventors: Debendra Mallik, Sergio Antonio Chan Arguedas, Jimin Yao, Chandra Mohan Jha
  • Publication number: 20200411407
    Abstract: Disclosed herein are integrated circuit (IC) packages with solder thermal interface materials (STIM), as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, a die between the package substrate and the lid, and a STIM between the die and the lid. The STIM may have a thickness that is less than 200 microns.
    Type: Application
    Filed: June 26, 2019
    Publication date: December 31, 2020
    Applicant: Intel Corporation
    Inventors: Manish Dubey, Sergio Antonio Chan Arguedas
  • Publication number: 20200402884
    Abstract: Disclosed herein are vented lids for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, and a die between the package substrate and the lid. A vent may extend between the interior surface and the exterior surface of the lid, and the vent may at least partially overlap the die.
    Type: Application
    Filed: June 19, 2019
    Publication date: December 24, 2020
    Applicant: Intel Corporation
    Inventors: Zhimin Wan, Sergio Antonio Chan Arguedas, Peng Li, Chandra Mohan Jha, Aravindha R. Antoniswamy, Cheng Xu, Junnan Zhao, Ying Wang
  • Publication number: 20200388554
    Abstract: Disclosed herein are lids for integrated circuit (IC) packages with solder thermal interface materials (STIMs), as well as related methods and devices. For example, in some embodiments, an IC package may include a STIM between a die of the IC package and a lid of the IC package. The lid of the IC package may include nickel, the IC package may include an intermetallic compound (IMC) between the STIM and the nickel, and the lid may include an intermediate material between the nickel and the IMC.
    Type: Application
    Filed: June 7, 2019
    Publication date: December 10, 2020
    Applicant: INTEL CORPORATION
    Inventors: Bamidele Daniel Falola, Susmriti Das Mahapatra, Sergio Antonio Chan Arguedas, Peng Li, Amitesh Saha