Abstract: Embodiments of the disclosure advantageously provide semiconductor devices CFET in particular and methods of manufacturing such devices having a fully strained superlattice structure with channel layers that are substantially free of defects and release layers having a reduced selective removal rate. The CFET described herein comprise a vertically stacked superlattice structure on a substrate, the vertically stacked superlattice structure comprising: a first hGAA structure on the substrate; a sacrificial layer on a top surface of the first hGAA structure, the sacrificial layer comprising silicon germanium (SiGe) having a germanium content in a range of from greater than 0% to 50% on an atomic basis; and a second hGAA structure on a top surface of the sacrificial layer. Each of the first hGAA and the second hGAA comprise alternating layers of nanosheet channel layer that comprise silicon (Si) and nanosheet release layer that comprise doped silicon germanium (SiGe).

Abstract: A method includes forming, on a substrate by performing physical vapor deposition in vacuum, an absorber layer including copper (Cu), indium (In), gallium (Ga) and selenium (Se), forming a stack including the substrate and an oxygen-annealed absorber layer by performing in-situ oxygen annealing of the absorber layer to improve quantum efficiency of the image sensor by passivating selenium vacancies due to dangling bonds, and forming a cap layer over the oxygen-annealed absorber layer by performing physical vapor deposition in vacuum. The cap layer includes at least one of: Ga2O3·Sn, ZnS, CdS, CdSe, ZnO, ZnSe, ZnIn2Se4, CuGaS2, In2S3, MgO, or Zn0.8Mg0.2O.

Abstract: Embodiments of the present disclosure relate to photovoltaic devices, CIGS containing films, and methods of manufacturing CIGS containing films and photovoltaic devices to improve quantum efficiency, reduce interface charges, electron losses, and electron re-combinations. The CIGS layers in the photovoltaic devices described herein may be deposited using physical vapor deposition, followed by in-situ oxygen annealing, and further followed by deposition of a cap layer over the CIGS layer without subjecting the CIGS layer to an air break.

Abstract: Disclosed herein is an electrostatic chuck (ESC) carrier. The ESC carrier may comprise a carrier substrate having a first surface and a second surface opposite the first surface. A first through substrate opening and a second through substrate opening may pass through the carrier substrate from the first surface to the second surface. A first conductor is in the first through substrate opening, and a second conductor is in the second through substrate opening. The ESC carrier may further comprise a first electrode over the first surface of the carrier substrate and electrically coupled to the first conductor, and a second electrode over the first surface of the carrier substrate and electrically coupled to the second conductor. An oxide layer may be formed over the first electrode and the second electrode.

Abstract: Methods and apparatus form a photon absorber layer of a photodiode with characteristics conducive to applications such as, but not limited to, image sensors and the like. The absorber layer uses a copper-indium-gallium-selenium (CIGS) material with a gallium mole fraction of approximately 35% to approximately 70% to control the absorbed wavelengths while reducing dark current. Deposition temperatures of the absorber layer are controlled to less than approximately 400 degrees Celsius to produce sub-micron grain sizes. The absorber layer is doped with antimony at a temperature of less than approximately 400 degrees Celsius to increase the absorption.

Abstract: Embodiments of the present disclosure relate to photovoltaic devices, CIGS containing films, and methods of manufacturing CIGS containing films and photovoltaic devices to improve quantum efficiency, reduce interface charges, electron losses, and electron re-combinations. The CIGS layers in the photovoltaic devices described herein may be deposited using physical vapor deposition, followed by in-situ oxygen annealing, and further followed by deposition of a cap layer over the CIGS layer without subjecting the CIGS layer to an air break.

Abstract: Embodiments disclosed herein include photodiodes and methods of forming such photodiodes. In an embodiment, a method of creating a photodiode, comprises disposing an absorber layer over a first contact, wherein the absorber layer comprises a first conductivity type, and disposing a semiconductor layer over the absorber, wherein the semiconductor layer has a second conductivity type that is opposite from the first conductivity type. In an embodiment, the method further comprises disposing a hole blocking layer over the semiconductor layer, wherein the hole blocking layer is formed with a reactive sputtering process with a processing gas that comprises oxygen, and disposing a second contact over the hole blocking layer.

Abstract: The disclosure describes techniques for forming an ohmic contact layer in a wafer containing CMOS devices and attaching a VCSEL die therein. A composite layer that forms the ohmic contact layer is selected based on the epitaxially-grown compound semiconductor material of the VCSEL die. The ohmic contact layer may not comprise gold, as gold introduces contamination in the rest of the CMOS process. The wafer may have an allocated area for accepting the VCSEL die. The allocated area may have a recess to facilitate placement of the VCSEL die.

Abstract: Embodiments disclosed herein include CMOS image sensors and methods of forming such devices. In an embodiment, a method of forming a CMOS image sensor comprises pressurizing a chamber with a gas comprising hydrogen, and annealing a substrate in the pressurized chamber. In an embodiment the substrate comprises the CMOS image sensor. In an embodiment, the CMOS image sensor comprises a semiconductor body and a trench around a perimeter the semiconductor body, wherein the trench is filled with a high-k oxide that directly contacts the semiconductor body. In an embodiment, the method further comprises, depressurizing the chamber.

Abstract: Embodiments disclosed herein include photodiodes and methods of forming such photodiodes. In an embodiment, a method of creating a photodiode, comprises disposing an absorber layer over a first contact, wherein the absorber layer comprises a first conductivity type, and disposing a semiconductor layer over the absorber, wherein the semiconductor layer has a second conductivity type that is opposite from the first conductivity type. In an embodiment, the method further comprises disposing a hole blocking layer over the semiconductor layer, wherein the hole blocking layer is formed with a reactive sputtering process with a processing gas that comprises oxygen, and disposing a second contact over the hole blocking layer.

Abstract: A sealing structure is between a workpiece or substrate and a carrier for plasma processing. In one example, a substrate carrier has a top surface for holding a substrate, the top surface having a perimeter and a resilient sealing ridge on the perimeter of the top surface to contact the substrate when the substrate is being carried on the carrier.

Abstract: An electrostatic chucking force tool is described that may be used on workpiece carriers for micromechanical and semiconductor processing. One example includes a workpiece fitting to hold a workpiece when gripped by an electrostatic chucking force by an electrostatic chuck, an arm coupled to the workpiece fitting to pull the workpiece through the workpiece fitting laterally across the chuck, and a force gauge coupled to the arm to measure an amount of force with which the workpiece fitting is pulled by the arm in order to move the workpiece.

Abstract: Embodiments include a method for processing thin substrates. Embodiments may include electrostatically bonding a substrate to a first electrostatic carrier (ESC), with a backside of the substrate is facing away from the first ESC. Thereafter, the substrate may be thinned to form a thinned substrate. The thinned substrate may then be transferred to a second ESC with a front side of the thinned substrate facing away from the second ESC. Embodiments may include cleaning the front side surface of the thinned substrate and transferring the thinned substrate to a third ESC. In an embodiment, a backside of the thinned substrate is facing away from the third ESC. Embodiments may also include processing the backside surface of the thinned substrate, and transferring the thinned substrate to a tape frame.

Abstract: Embodiments disclosed herein may include an electrostatic chuck (ESC) carrier. In an embodiment, the ESC carrier may comprise a carrier substrate having a first surface and a second surface opposite the first surface. In an embodiment, a first through substrate opening and a second through substrate opening may pass through the carrier substrate from the first surface to the second surface. Embodiments may include a first conductor in the first through substrate opening, and a second conductor in the second through substrate opening. In an embodiment, the ESC carrier may further comprise a first electrode over the first surface of the carrier substrate and electrically coupled to the first conductor, and a second electrode over the first surface of the carrier substrate and electrically coupled to the second conductor. In an embodiment, an oxide layer may be formed over the first electrode and the second electrode.

Abstract: Methods and apparatus form a photon absorber layer of a photodiode with characteristics conducive to applications such as, but not limited to, image sensors and the like. The absorber layer uses a copper-indium-gallium-selenium (CIGS) material with a gallium mole fraction of approximately 35% to approximately 70% to control the absorbed wavelengths while reducing dark current. Deposition temperatures of the absorber layer are controlled to less than approximately 400 degrees Celsius to produce sub-micron grain sizes. The absorber layer is doped with antimony at a temperature of less than approximately 400 degrees Celsius to increase the absorption.

Abstract: Methods and apparatus form an image sensor pixel circuit on flexible and non-flexible substrates. At least one indium-gallium-zinc-oxide (IGZO) thin film transistor (TFT) is formed at a process temperature of approximately 400 degrees Celsius or less and at least one photodiode is formed on at least one of the at least one IGZO TFT. The at least one photodiode having an absorption layer formed, at least in part, by depositing a copper-indium-gallium-selenium (CIGS) material with a gallium mole fraction of approximately 35% to approximately 70% at a process temperature of less than or equal to approximately 400 degrees Celsius and doping the CIGS material with antimony at a process temperature of less than or equal to approximately 400 degrees Celsius.

Abstract: Embodiments of the present disclosure provide for patterned substrates and methods of forming a patterned substrate, particularly a self-assembly pattern on a surface of a substrate, such as a host substrate, subsequently used in a chip to wafer (C2W) direct bonding process. In one embodiment, a method of patterning a substrate includes depositing a first material layer on a surface of a substrate, depositing a resist layer on the first material layer, patterning the resist layer to form a plurality of openings therethrough, transferring the pattern in the resist layer to the first material layer to form a plurality of self-assembly regions each comprising a hydrophilic assembly surface, and removing the resist layer to expose one or more hydrophobic bounding surfaces. Herein, the first material layer comprises a hydrophobic material.

Abstract: Embodiments include a method for processing thin substrates. Embodiments may include electrostatically bonding a substrate to a first electrostatic carrier (ESC), with a backside of the substrate is facing away from the first ESC. Thereafter, the substrate may be thinned to form a thinned substrate. The thinned substrate may then be transferred to a second ESC with a front side of the thinned substrate facing away from the second ESC. Embodiments may include cleaning the front side surface of the thinned substrate and transferring the thinned substrate to a third ESC. In an embodiment, a backside of the thinned substrate is facing away from the third ESC. Embodiments may also include processing the backside surface of the thinned substrate, and transferring the thinned substrate to a tape frame.

Abstract: The present disclosure relates to an electrostatic chuck, including: a base having a dielectric first surface to support a substrate thereon during processing; and an electrode disposed within the base proximate the dielectric first surface to facilitate electrostatically coupling the substrate to the dielectric first surface during use, wherein the dielectric first surface is sufficiently hydrophobic to electrostatically retain the substrate to the dielectric first surface when contacted with water. Methods of making and using the electrostatic chuck under wet conditions are also disclosed.

Abstract: Embodiments of the disclosure relate to the use of an electrostatic carrier for securing, transporting and assembling dies on a substrate. In one embodiment, an electrostatic carrier includes a body having a top surface and a bottom surface, at least a first bipolar chucking electrode disposed within the body, at least two contact pads disposed on the bottom surface of the body and connected to the first bipolar chucking electrode, and a floating electrode disposed between the first bipolar chucking electrode and the bottom surface. In another embodiment, a die-assembling system includes the electrostatic carrier configured to electrostatically secure a plurality of dies, a carrier-holding platform configured to hold the electrostatic carrier, a die input platform and a loading robot having a range of motion configured to pick the plurality of dies from the die input platform and place them on the electrostatic carrier.