Patents by Inventor Seung Ho Chae
Seung Ho Chae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11776962Abstract: An integrated circuit device is provided. The integrated circuit device includes a fin-type active region that extends in a first direction on a substrate, a gate structure that intersects with the fin-type active region and extends in a second direction, perpendicular to the first direction, on the substrate, and a first contact structure that is disposed on the gate structure, and has a greater width at a top surface than a bottom surface thereof.Type: GrantFiled: April 7, 2022Date of Patent: October 3, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hong-sik Shin, Heung-sik Park, Do-haing Lee, In-keun Lee, Seung-ho Chae, Ha-young Choi
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Publication number: 20230159270Abstract: An automated transportation system includes a facility layer including at least one first transportation facility, and a system layer, in which an integrated control system controlling the at least one first transportation facility, a material control system (MCS) controlling a transport command with respect to the integrated control system, an application server managing a Real-Time Dispatcher (RTD), and a database storing information corresponding to an operation of the material control system and the real-time dispatcher are established. The facility layer and the system layer are spatially separated. Therefore, in the automated transportation system, the integrated server may be efficiently and stably operated, to quickly respond to a problem when a problem occurs in the system.Type: ApplicationFiled: November 23, 2022Publication date: May 25, 2023Inventors: Sang Ho PARK, Hyun Ho CHOI, Jun Seok KIM, Seung Joon RHIE, Soo Hwang CHAE, Seong Heon TAK, Min HUR
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Publication number: 20220231025Abstract: An integrated circuit device is provided. The integrated circuit device includes a fin-type active region that extends in a first direction on a substrate, a gate structure that intersects with the fin-type active region and extends in a second direction, perpendicular to the first direction, on the substrate, and a first contact structure that is disposed on the gate structure, and has a greater width at a top surface than a bottom surface thereof.Type: ApplicationFiled: April 7, 2022Publication date: July 21, 2022Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hong-sik SHIN, Heung-sik PARK, Do-haing LEE, In-keun LEE, Seung-ho CHAE, Ha-young CHOI
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Patent number: 11329044Abstract: An integrated circuit device is provided. The integrated circuit device includes a fin-type active region that extends in a first direction on a substrate, a gate structure that intersects with the fin-type active region and extends in a second direction, perpendicular to the first direction, on the substrate, and a first contact structure that is disposed on the gate structure, and has a greater width at a top surface than a bottom surface thereof.Type: GrantFiled: November 18, 2020Date of Patent: May 10, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hong-sik Shin, Heung-sik Park, Do-haing Lee, In-keun Lee, Seung-ho Chae, Ha-young Choi
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Publication number: 20210091081Abstract: An integrated circuit device is provided. The integrated circuit device includes a fin-type active region that extends in a first direction on a substrate, a gate structure that intersects with the fin-type active region and extends in a second direction, perpendicular to the first direction, on the substrate, and a first contact structure that is disposed on the gate structure, and has a greater width at a top surface than a bottom surface thereof.Type: ApplicationFiled: November 18, 2020Publication date: March 25, 2021Applicant: SAMSUNG ELECTTRONICS CO, LTD.Inventors: Hong-sik SHIN, Heung-sik PARK, Do-haing LEE, In-Keun LEE, Seung-ho CHAE, Ha-young CHOI
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Patent number: 10879244Abstract: An integrated circuit device is provided. The integrated circuit device includes a fin-type active region that extends in a first direction on a substrate, a gate structure that intersects with the fin-type active region and extends in a second direction, perpendicular to the first direction, on the substrate, and a first contact structure that is disposed on the gate structure, and has a greater width at a top surface than a bottom surface thereof.Type: GrantFiled: June 17, 2019Date of Patent: December 29, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hong-sik Shin, Heung-sik Park, Do-haing Lee, In-keun Lee, Seung-ho Chae, Ha-young Choi
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Publication number: 20200075596Abstract: An integrated circuit device includes a fin-type active region extending in a first direction parallel on a substrate, a gate structure intersecting with the fin-type active region and extending in a second direction, perpendicular to the first direction, on the substrate, and a first contact structure disposed on the gate structure, an having a greater width at a top surface than a bottom surface thereof.Type: ApplicationFiled: June 17, 2019Publication date: March 5, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hong-sik Shin, Heung-sik Park, Do-haing Lee, In-keun Lee, Seung-ho Chae, Ha-young Choi
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Publication number: 20170156932Abstract: Disclosed are earplugs capable of providing a good feel when worn, buffering external impact, and blocking noise or controlling the volume of the noise coming in from the outside. The earplugs comprise: a main body having a small cross-sectional part and an extended part; and an ear pad, which is mounted on the outer circumferential surface of the small cross-sectional part, comes into contact with the inner circumferential surface of an ear canal when worn in an ear, and blocks the gap between the outer circumferential surface of the small cross-sectional part and the inner circumferential surface of the ear canal, the earplugs also comprising a flexible part, which is installed between the small cross-sectional part and the extended part and allows the adjustment of the position of the extended part with respect to the small cross-sectional part.Type: ApplicationFiled: April 16, 2015Publication date: June 8, 2017Inventors: Seung Ho CHAE, Eui Jin LEE
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Patent number: 8927372Abstract: A semiconductor device may include a first insulating layer disposed on a substrate, a gate electrode disposed on the first insulating layer, and a second insulating layer disposed on the gate electrode and the first insulating layer. The second insulating layer includes a first discharge site.Type: GrantFiled: February 12, 2013Date of Patent: January 6, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Yongkuk Jeong, Seung Ho Chae, Jung Shik Heo
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Publication number: 20140168267Abstract: A projection-based augmented reality system and a control method thereof are provided. The control method of an augmented reality system includes determining a conversion area to be converted from a work area based on a first gesture, acquiring a captured image of the determined conversion area, generating a virtual image of the determined conversion area from the acquired captured image, displaying the generated virtual image in the work area, and performing a manipulation function with respect to the displayed virtual image based on a second gesture.Type: ApplicationFiled: December 11, 2013Publication date: June 19, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Hark-Joon KIM, Tack-Don HAN, Ha-Young KIM, Jong-Hoon SEO, Seung-Ho CHAE
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Publication number: 20140120681Abstract: A method of fabricating a semiconductor device includes forming a gate electrode structure on a substrate, forming a first spacer material layer covering the gate electrode structure, forming a second spacer material layer covering the first spacer material layer, and etching the first and second spacer material layers using an etch-back process to form first and second spacers.Type: ApplicationFiled: June 20, 2013Publication date: May 1, 2014Inventors: Chong-Kwang CHANG, Se-Young LEE, Seung-Ho CHAE
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Publication number: 20140103405Abstract: A method is provided for fabricating a semiconductor device that includes: forming a gate pattern on a substrate; forming a source/drain in the vicinity of the gate pattern; forming an etch stop film, which covers the gate pattern and the source/drain, on the substrate; forming an interlayer insulating film on the etch stop film; forming a shared contact hole that exposes the gate pattern and the source/drain by etching the interlayer insulating film, wherein a polymer is generated in the shared contact hole a process of etching the interlayer insulating film; removing the polymer by performing etching using hydrogen gas, nitrogen gas or a mixture of hydrogen and nitrogen before etching the etch stop film; and etching the etch stop film.Type: ApplicationFiled: July 23, 2013Publication date: April 17, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Chong-Kwang Chang, Hak-Yoon Ahn, Young-Mook Oh, Jung-Hoon Lee, Seung-Ho Chae
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Publication number: 20130302964Abstract: A semiconductor device may include a first insulating layer disposed on a substrate, a gate electrode disposed on the first insulating layer, and a second insulating layer disposed on the gate electrode and the first insulating layer. The second insulating layer includes a first discharge site.Type: ApplicationFiled: February 12, 2013Publication date: November 14, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yongkuk JEONG, Seung Ho Chae, Jung Shik Heo