Abstract: A system and method of improving the efficiency in the power consumption of an audio system. In essence, the technique is to adjust the power delivered from the power supply to the analog section, such as the power amplifier, in response to the volume level indicated by the volume control module and/or in response to the detected characteristic of the input audio signal. Thus, in this manner, the analog section is operated in a manner that is related to the level of the signal it is processing. Additionally, the system and method also relate to a technique of adjusting the dynamic ranges of the digital signal and the analog signal to improve the overall dynamic range of the system without needing to consume additional power.

Abstract: A multi-mode amplifier with configurable DC-coupled or AC-coupled output is described. In one design, the multi-mode amplifier includes an amplifier and at least one DC level shifting circuit. The amplifier receives and amplifies an input signal and provides an output signal that is suitable for DC coupling to a load in a DC-coupled mode and for AC coupling to the load in an AC-coupled mode. The at least one DC level shifting circuit performs DC level shifting for at least one (e.g., input and/or output) common-mode voltage of the amplifier and is controlled based on whether the amplifier is operating in the DC-coupled or AC-coupled mode. The amplifier operates between VDD and VNEG supplies in the DC-coupled mode and between VDD and VSS supplies in the AC-coupled mode. The amplifier may include at least one gain stage, an internal DC level shifting circuit, and an output stage.

Abstract: A digital offset is combined with an audio signal in the digital domain to cancel an output offset caused by one or more analog components processing the same audio signal. In this manner, the offset at the output of the audio signal path (e.g., at a power amplifier output) is reduced or eliminated. Consequently, audible artifacts, such as click-and-pop artifacts, can be reduced or eliminated. In audio devices operating in ground-referenced capless mode, power consumption is reduced because of reduced or eliminated direct current (DC) leakage current through speakers or headsets of such audio devices. In some circumstances, the digital offset in the digital domain may be applied at substantially all times of operation of the audio signal path.

Abstract: The present invention encompasses a mobile station comprising a transmitter for transmitting outgoing signals from the mobile station and a receiver for receiving incoming signals, the receiver coupled to the transmitter and having N subreceivers, where N is an integer greater than one and each of the N subreceivers may independently be tuned to a desired frequency.

Abstract: An improved power amplifier system is provided. The power amplifier system includes a programmable digital filter and a power amplifier, each responsive to a plurality of frequency response settings and switching frequency settings, respectively. Each frequency response setting and switching frequency setting is adaptively selected by a processor device to match a bandwidth of an incoming audio signal. The processor device identifies the current bandwidth of an incoming audio signal and adaptively selects a switching rate setting and a frequency response setting based on the current bandwidth. The frequency response setting is selected so as to reduce noise fold over in the power amplifier for a corresponding bandwidth, sampling rate setting, and switching frequency setting.

Abstract: An integrated audio transducer with associated signal processing electronics is disclosed. A silicon audio transducer, such as a MEMS microphone or speaker, can be integrated with audio processing electronics in a single package. The audio processing electronics can be configured using control signals. The audio processing electronics can provide a single line serial data interface and a single line control interface. The audio transducers can be integrated with associated processing electronics. A silicon microphone can be integrated with an Analog to Digital Converter (ADC). The ADC output can be a single line serial interface. The ADC can be configured using a single line serial control interface. A speaker may be integrated with a Digital to Analog Converter (DAC). Audio transducers can also be integrated with more complex processing electronics. Audio processing parameters such as gain, dynamic range, and filter characteristics may be configured using the serial interface.

Abstract: Complimentary Metal-Oxide-Semiconductor (CMOS) circuits made with core transistors are capable of reliable operation from an IO power supply with voltage that exceeds the reliability limit of the transistors. In embodiments, biasing of an operational amplifier is changed in part to a fixed voltage corresponding to the reliability limit. In embodiments, switched capacitor networks are made with one or more amplifiers and switches including core transistors, but without exposing the core transistors to voltages in excess of their reliability limit. In embodiments, operational transconductance amplifiers (OTAs) include core transistors and operate from IO power supplies. Level shifters for shifting the levels of a power down signal may be used to avoid excessive voltage stress of the OTAs' core transistors during turn-off. Non-level shifting means may be used to clamp output voltages and selected internal voltages of the OTAs, also avoiding excessive voltage stress of the core transistors during turn-off.

Abstract: An improved power amplifier system is provided. The power amplifier system includes a programmable digital filter and a power amplifier, each responsive to a plurality of frequency response settings and switching frequency settings, respectively. Each frequency response setting and switching frequency setting is adaptively selected by a processor device to match a bandwidth of an incoming audio signal. The processor device identifies the current bandwidth of an incoming audio signal and adaptively selects a switching rate setting and a frequency response setting based on the current bandwidth. The frequency response setting is selected so as to reduce noise fold over in the power amplifier for a corresponding bandwidth, sampling rate setting, and switching frequency setting.

Abstract: Techniques for adaptively generating bias current for a switched-capacitor circuit are described. The switched-capacitor circuit charges and discharges at least one switching capacitor at a sampling rate and may be a ?? ADC that digitizes an analog signal at the sampling rate and provides digital samples. The switched-capacitor circuit may support multiple modes associated with different sampling rates. A bias circuit generates a bias current for the switched-capacitor circuit to be proportional to the sampling rate for a selected mode, to provide a bandwidth proportional to the sampling rate for an operational transconductance amplifier (OTA) within the switched-capacitor circuit, and to track changes in the switching capacitor(s) due to variations in integrated circuit (IC) process and temperature. The settling time of the switched-capacitor circuit may track with the multiple modes and across IC process and temperature variations.

Abstract: Techniques for adaptively generating bias current for a switched-capacitor circuit are described. The switched-capacitor circuit charges and discharges at least one switching capacitor at a sampling rate and may be a ?? ADC that digitizes an analog signal at the sampling rate and provides digital samples. The switched-capacitor circuit may support multiple modes associated with different sampling rates. A bias circuit generates a bias current for the switched-capacitor circuit to be proportional to the sampling rate for a selected mode, to provide a bandwidth proportional to the sampling rate for an operational transconductance amplifier (OTA) within the switched-capacitor circuit, and to track changes in the switching capacitor(s) due to variations in integrated circuit (IC) process and temperature. The settling time of the switched-capacitor circuit may track with the multiple modes and across IC process and temperature variations.

Abstract: A system and method of improving the efficiency in the power consumption of an audio system. In essence, the technique is to adjust the power delivered from the power supply to the analog section, such as the power amplifier, in response to the volume level indicated by the volume control module and/or in response to the detected characteristic of the input audio signal. Thus, in this manner, the analog section is operated in a manner that is related to the level of the signal it is processing. Additionally, the system and method also relate to a technique of adjusting the dynamic ranges of the digital signal and the analog signal to improve the overall dynamic range of the system without needing to consume additional power.

Abstract: A digital offset is combined with an audio signal in the digital domain to cancel an output offset caused by one or more analog components processing the same audio signal. In this manner, the offset at the output of the audio signal path (e.g., at a power amplifier output) is reduced or eliminated. Consequently, audible artifacts, such as click-and-pop artifacts, can be reduced or eliminated. In audio devices operating in ground-referenced capless mode, power consumption is reduced because of reduced or eliminated direct current (DC) leakage current through speakers or headsets of such audio devices. In some circumstances, the digital offset in the digital domain may be applied at substantially all times of operation of the audio signal path.

Abstract: A multi-mode amplifier with configurable DC-coupled or AC-coupled output is described. In one design, the multi-mode amplifier includes an amplifier and at least one DC level shifting circuit. The amplifier receives and amplifies an input signal and provides an output signal that is suitable for DC coupling to a load in a DC-coupled mode and for AC coupling to the load in an AC-coupled mode. The at least one DC level shifting circuit performs DC level shifting for at least one (e.g., input and/or output) common-mode voltage of the amplifier and is controlled based on whether the amplifier is operating in the DC-coupled or AC-coupled mode. The amplifier operates between VDD and VNEG supplies in the DC-coupled mode and between VDD and VSS supplies in the AC-coupled mode. The amplifier may include at least one gain stage, an internal DC level shifting circuit, and an output stage.

Abstract: Complimentary Metal-Oxide-Semiconductor (CMOS) circuits made with core transistors are capable of reliable operation from an IO power supply with voltage that exceeds the reliability limit of the transistors. In embodiments, biasing of an operational amplifier is changed in part to a fixed voltage corresponding to the reliability limit. In embodiments, switched capacitor networks are made with one or more amplifiers and switches including core transistors, but without exposing the core transistors to voltages in excess of their reliability limit. In embodiments, operational transconductance amplifiers (OTAs) include core transistors and operate from IO power supplies. Level shifters for shifting the levels of a power down signal may be used to avoid excessive voltage stress of the OTAs' core transistors during turn-off. Non-level shifting means may be used to clamp output voltages and selected internal voltages of the OTAs, also avoiding excessive voltage stress of the core transistors during turn-off.

Abstract: Techniques for processing incoming signals conforming to a plurality of standards or communication formats with a single baseband receive section are disclosed. In one aspect, a plurality of analog processing components are adjusted in response to a format select signal, set according to one of a plurality of supported formats or standards. In another aspect, the operating mode of an A/D converter is tuned in response to the format select signal. In yet another aspect, the response characteristics of a jammer filter are tuned in response to the format select signal. In yet another aspect, the adjustment of the plurality of analog processing components is carried out by varying the frequency of a sample clock in response to the format select signal. Various other aspects are also presented. These aspects have the benefit of allowing a single baseband receive section to be deployed to process analog signals conforming to a plurality of communications standards or formats, in a power and area efficient manner.

Abstract: An on-chip detection circuit automatically detects when an external switch has been activated. When the device is initialized, the detection circuit measures the operating current and coverts the information into an analog voltage. The analog voltage is then processed through an on-chip analog-to-digital converter and the digitized result is stored as a reference value. To sense the open and close action of the off-chip mechanical switch, the device then takes a sample of the operating current periodically, digitizes this information and compares the sampled value to the reference value. A change in value larger than some predetermined level indicates the external switch has been activated.

Abstract: The present invention encompasses a mobile station comprising a transmitter for transmitting outgoing signals from the mobile station and a receiver for receiving incoming signals, the receiver coupled to the transmitter and having N subreceivers, where N is an integer greater than one and each of the N subreceivers may independently be tuned to a desired frequency.

Abstract: The present invention encompasses a mobile station comprising a transmitter for transmitting outgoing signals from the mobile station and a receiver for receiving incoming signals, the receiver coupled to the transmitter and having N sub receivers, where N is an integer greater than one and each of the N sub receivers may independently be tuned to a desired frequency.

Abstract: An integrated audio transducer with associated signal processing electronics is disclosed. A silicon audio transducer, such as a MEMS microphone or speaker, can be integrated with audio processing electronics in a single package. The audio processing electronics can be configured using control signals. The audio processing electronics can provide a single line serial data interface and a single line control interface. The audio transducers can be integrated with associated processing electronics. A silicon microphone can be integrated with an Analog to Digital Converter (ADC). The ADC output can be a single line serial interface. The ADC can be configured using a single line serial control interface. A speaker may be integrated with a Digital to Analog Converter (DAC). Audio transducers can also be integrated with more complex processing electronics. Audio processing parameters such as gain, dynamic range, and filter characteristics may be configured using the serial interface.

Abstract: A digital to analog converter augmented with Direct Charge Transfer (DCT) techniques. A digital to analog converter augmented with DCT and CDS techniques. A digital to analog converter augmented with Postfilter Droop Compensation.