Patents by Inventor Shachi K. Thakkar

Shachi K. Thakkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10915254
    Abstract: Technologies for accessing memory devices of a memory module device includes receiving a memory read request form a host and reading, in response to the memory read request, a rank of active non-volatile memory devices of the memory module device while contemporaneously accessing a volatile memory device of the memory module device. The volatile memory device shares data lines of a data bus of the memory module device with a spare non-volatile memory device associated with the rank of active non-volatile memory devices. During write operations, each of the rank of active non-volatile memory devices and the spare non-volatile memory device associated with the rank of active non-volatile memory devices are written to facilitate proper wear leveling of the non-volatile memory devices. The spare non-volatile memory device may replace a failed non-volatile memory devices of the rank of active non-volatile memory devices.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: February 9, 2021
    Assignee: Intel Corporation
    Inventors: Kunal A. Khochare, Camille C. Raad, Richard P. Mangold, Shachi K. Thakkar
  • Publication number: 20190258414
    Abstract: Technologies for accessing memory devices of a memory module device includes receiving a memory read request form a host and reading, in response to the memory read request, a rank of active non-volatile memory devices of the memory module device while contemporaneously accessing a volatile memory device of the memory module device. The volatile memory device shares data lines of a data bus of the memory module device with a spare non-volatile memory device associated with the rank of active non-volatile memory devices. During write operations, each of the rank of active non-volatile memory devices and the spare non-volatile memory device associated with the rank of active non-volatile memory devices are written to facilitate proper wear leveling of the non-volatile memory devices. The spare non-volatile memory device may replace a failed non-volatile memory devices of the rank of active non-volatile memory devices.
    Type: Application
    Filed: May 7, 2019
    Publication date: August 22, 2019
    Inventors: Kunal A. Khochare, Camille C. Raad, Richard P. Mangold, Shachi K. Thakkar
  • Patent number: 10296238
    Abstract: Technologies for accessing memory devices of a memory module device includes receiving a memory read request form a host and reading, in response to the memory read request, a rank of active non-volatile memory devices of the memory module device while contemporaneously accessing a volatile memory device of the memory module device. The volatile memory device shares data lines of a data bus of the memory module device with a spare non-volatile memory device associated with the rank of active non-volatile memory devices. During write operations, each of the rank of active non-volatile memory devices and the spare non-volatile memory device associated with the rank of active non-volatile memory devices are written to facilitate proper wear leveling of the non-volatile memory devices. The spare non-volatile memory device may replace a failed non-volatile memory devices of the rank of active non-volatile memory devices.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: May 21, 2019
    Assignee: Intel Corporation
    Inventors: Kunal A. Khochare, Camille C. Raad, Richard P. Mangold, Shachi K. Thakkar
  • Publication number: 20180188959
    Abstract: An embodiment of a memory module controller may be communicatively coupled to a storage media to initialize training-related register values, train the storage media independent of a BIOS, calibrate a sense amplifier, and indicate when the storage media is completely trained. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: December 29, 2016
    Publication date: July 5, 2018
    Inventors: Shachi K. Thakkar, Richard P. Mangold, Tonia G. Morris, John V. Lovelace
  • Publication number: 20170177244
    Abstract: Technologies for accessing memory devices of a memory module device includes receiving a memory read request form a host and reading, in response to the memory read request, a rank of active non-volatile memory devices of the memory module device while contemporaneously accessing a volatile memory device of the memory module device. The volatile memory device shares data lines of a data bus of the memory module device with a spare non-volatile memory device associated with the rank of active non-volatile memory devices. During write operations, each of the rank of active non-volatile memory devices and the spare non-volatile memory device associated with the rank of active non-volatile memory devices are written to facilitate proper wear leveling of the non-volatile memory devices. The spare non-volatile memory device may replace a failed non-volatile memory devices of the rank of active non-volatile memory devices.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 22, 2017
    Inventors: Kunal A. Khochare, Camille C. Raad, Richard P. Mangold, Shachi K. Thakkar
  • Publication number: 20170168747
    Abstract: Embodiments are generally directed to intelligent memory support for platform reset operation. An embodiment of a memory module includes a memory module controller and one or more memory banks. The memory module controller is to perform one or more internal reset processes as required for the memory module, and is to support a plurality of host platform reset processes to synchronize with the host platform.
    Type: Application
    Filed: December 11, 2015
    Publication date: June 15, 2017
    Inventors: Woojong Han, John V. Lovelace, Priscilla Y. Lam, Richard P. Mangold, Asher M. Altman, Shachi K. Thakkar