Patents by Inventor Shamala A. Chickamenahalli

Shamala A. Chickamenahalli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9330827
    Abstract: A process of making inductors for integrated circuit packages may involve forming an inductor upon a magnetic film on a package substrate. Conductors coupled either to a die or a voltage converter extend perpendicularly through the film to conductive plates, defining current paths through and across the film.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: May 3, 2016
    Assignee: Intel Corporation
    Inventors: Donald Gardner, Gerhard Schrom, Fabrice Paillet, Shamala Chickamenahalli
  • Publication number: 20140217547
    Abstract: Semiconductor die packaged with air core inductors (ACIs) and magnetic core inductors (MCIs), or with multiple MCIs, are described. In a first example, a semiconductor package includes a semiconductor die, one or more air core inductors (ACIs) coupled to the semiconductor die, and one or more magnetic core inductors (MCIs) coupled to the semiconductor die. In a second example, a semiconductor package includes a semiconductor die, a first magnetic core inductor (MCI) coupled to the semiconductor die and having a first saturation current, and a second MCI coupled to the semiconductor die and having a second, different, saturation current.
    Type: Application
    Filed: March 29, 2012
    Publication date: August 7, 2014
    Inventors: Adel A. Elsherbini, Krishna Bharath, Shamala A. Chickamenahalli
  • Patent number: 8243410
    Abstract: A transient voltage compensation system is provided. The transient voltage compensation system includes a processor and a first voltage regulator coupled to the processor, wherein the first voltage regulator is to deliver a load current to the processor at an output voltage. The transient voltage compensation system also includes a second voltage regulator coupled to the first voltage regulator, wherein the second voltage regulator is to regulate the output voltage in response to transient loads of the processor.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: August 14, 2012
    Assignee: Intel Corporation
    Inventors: Rajapandian Ayyanar, William J. Lambert, Shamala A. Chickamenahalli
  • Publication number: 20110131797
    Abstract: An inductor may be formed from a magnetic film on a package substrate. Conductors coupled either to a die or a voltage converter extend perpendicularly through the film to conductive plates, defining current paths through and across the film.
    Type: Application
    Filed: February 14, 2011
    Publication date: June 9, 2011
    Inventors: Donald Gardner, Gerhard Schrom, Fabrice Paillet, Shamala Chickamenahalli
  • Patent number: 7956713
    Abstract: In one embodiment, the present invention includes an apparatus having a substrate with vias extending between first and second surfaces thereof, and at least one helical inductor adapted within a via, which may be formed of a conductive material. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: June 7, 2011
    Assignee: Intel Corporation
    Inventors: Arun Chandrasekhar, Srikrishnan Venkataraman, Priyavadan R. Patel, Shamala Chickamenahalli, Robert J. Fite, Charan Gurumurthy
  • Patent number: 7911313
    Abstract: An inductor may be formed from a magnetic film on a package substrate. Conductors coupled either to a die or a voltage converter extend perpendicularly through the film to conductive plates, defining current paths through and across the film.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: March 22, 2011
    Assignee: Intel Corporation
    Inventors: Donald Gardner, Gerhard Schrom, Fabrice Paillet, Shamala Chickamenahalli
  • Publication number: 20100001826
    Abstract: An inductor may be formed from a magnetic film on a package substrate. Conductors coupled either to a die or a voltage converter extend perpendicularly through the film to conductive plates, defining current paths through and across the film.
    Type: Application
    Filed: July 2, 2008
    Publication date: January 7, 2010
    Inventors: Donald Gardner, Gerhard Schrom, Fabrice Paillet, Shamala Chickamenahalli
  • Publication number: 20090322291
    Abstract: In some embodiments, one or more configurably or selectably engageable power transistors are integrated into a chip comprising an output drive power module for a voltage regulator (VR). In some embodiments, a chip with an output drive power module may have a pulse width modulator (PWM) input that can accommodate both a single PWM drive signal and independent high side and low side PWM drive signals.
    Type: Application
    Filed: June 30, 2008
    Publication date: December 31, 2009
    Inventors: Mike M. Ngo, Steve Varnum, Shamala Chickamenahalli, Nicholas Triantafillou
  • Publication number: 20090279224
    Abstract: A transient voltage compensation system is provided. The transient voltage compensation system includes a processor and a first voltage regulator coupled to the processor, wherein the first voltage regulator is to deliver a load current to the processor at an output voltage. The transient voltage compensation system also includes a second voltage regulator coupled to the first voltage regulator, wherein the second voltage regulator is to regulate the output voltage in response to transient loads of the processor.
    Type: Application
    Filed: May 7, 2008
    Publication date: November 12, 2009
    Inventors: Rajapandian Ayyanar, William J. Lambert, Shamala A. Chickamenahalli
  • Patent number: 7583128
    Abstract: Methods, systems and apparatus for a controller for fast transient response, the controller including a linear compensation circuit for controlling output voltage during steady state operation and a non-linear control circuit to generate a non-linear signal during transient periods, only a first pulse of the non-linear signal is injected during each transient period. The combination linear and non-linear control provides stability and reduces delay times for fast transient response. The non-linear control circuit includes a step up and a step down non-linear control circuit for producing the non-linear signal with a short delay time when the load voltage is less or greater than the reference voltage. An embodiment includes an adaptive circuit or generating a current signal dependent on the load current, the current signal is combined with the output voltage to reduce the difference between the reference and output voltages.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: September 1, 2009
    Assignee: University of Central Florida Research Foundation, Inc.
    Inventors: Issa Batarseh, Xiangcheng Wang, Shamala A. Chickamenahalli, Edward R. Stanford
  • Publication number: 20090079530
    Abstract: In one embodiment, the present invention includes an apparatus having a substrate with vias extending between first and second surfaces thereof, and at least one helical inductor adapted within a via, which may be formed of a conductive material. Other embodiments are described and claimed.
    Type: Application
    Filed: September 25, 2007
    Publication date: March 26, 2009
    Inventors: Arun Chandrasekhar, Srikrishnan Venkataraman, Priyavadan R. Patel, Shamala Chickamenahalli, Robert J. Fite, Charan Gurumurthy
  • Patent number: 7251113
    Abstract: A direct current to direct current (DC-to-DC) converter having an active transient voltage compensator (ATVC) coupled with the DC-to-DC converter output terminal to improve a fast transient response of the DC-to-DC converter. The active transient voltage compensator compensates the DC output only during transient operation The ATVC includes a transformer for reducing the ATVC current stresses to improve the compensator efficiency and injecting, absorbing high slew rate current, and a controller circuit for controlling ATVC operation in steady state and normal operation in transients. During step-up load the ATVC operates as a buck converter and during step-down load, the ATVC operates as a boost converter while the main converter operates at low switching frequency for good efficiency.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: July 31, 2007
    Assignee: Research Foundation of The University of Central Florida
    Inventors: Issa Batarseh, Xiangcheng Wang, Shamala A. Chickamenahalli, Edward Stanford
  • Patent number: 7046528
    Abstract: A pulse width modulation voltage regulator comprises a pulse width modulation circuit and a control circuit. The control circuit is operable to reduce a pulse modulation frequency of the pulse width modulation circuit when a load current increases and to increase the pulse modulation frequency of the pulse width modulation circuit when the load current decreases.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: May 16, 2006
    Assignee: Intel Corporation
    Inventors: Robert L. Sankman, Shamala Chickamenahalli
  • Publication number: 20050112842
    Abstract: An embodiment of the present invention is a technique to integrate passive components in a die assembly. A capacitor, inductor, or resistor is integrated on a spacer between upper and lower dies in stacked dies. Conductors are attached to the capacitor, inductor or resistor to connect the capacitor, inductor, or resistor to at least one of the upper and lower dies.
    Type: Application
    Filed: November 24, 2003
    Publication date: May 26, 2005
    Inventors: Jung Kang, Kaladhar Radhakrishnan, Shamala Chickamenahalli
  • Publication number: 20040125623
    Abstract: A pulse width modulation voltage regulator comprises a pulse width modulation circuit and a control circuit. The control circuit is operable to reduce a pulse modulation frequency of the pulse width modulation circuit when a load current increases and to increase the pulse modulation frequency of the pulse width modulation circuit when the load current decreases.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: Robert L. Sankman, Shamala Chickamenahalli
  • Patent number: 6469908
    Abstract: An interposer includes two separate sets of pins, and inserts into two sockets on a printed circuit board. One set of pins supplies power to a step down converter (SDC) mounted on the interposer. The second set of pins provide inputs and outputs to an integrated circuit mounted on the interposer. One or more conductive traces in or on the interposer electrically connect an output of the SDC to an input of the integrated circuit, thus supplying regulated power to the integrated circuit through the interposer. The SDC and integrated circuit can be directly mounted on the interposer, or either or both can be mounted on packages that connect to the interposer. The SDC and integrated circuit can be flip chips or can be connected to the interposer or package using wirebonds. The packages can be pinned or connectable by solder bumps.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: October 22, 2002
    Assignee: Intel Corporation
    Inventors: P. R. Patel, Yuan-Liang Li, David G. Figueroa, Shamala Chickamenahalli, Huong T. Do
  • Publication number: 20020089833
    Abstract: An interposer includes two separate sets of pins, and inserts into two sockets on a printed circuit board. One set of pins supplies power to a step down converter (SDC) mounted on the interposer. The second set of pins provide inputs and outputs to an integrated circuit mounted on the interposer. One or more conductive traces in or on the interposer electrically connect an output of the SDC to an input of the integrated circuit, thus supplying regulated power to the integrated circuit through the interposer. The SDC and integrated circuit can be directly mounted on the interposer, or either or both can be mounted on packages that connect to the interposer. The SDC and integrated circuit can be flip chips or can be connected to the interposer or package using wirebonds. The packages can be pinned or connectable by solder bumps.
    Type: Application
    Filed: February 14, 2002
    Publication date: July 11, 2002
    Applicant: Intel Corporation
    Inventors: P.R. Patel, Yuan-Liang Li, David G. Figueroa, Shamala Chickamenahalli, Huong T. Do
  • Patent number: 6366467
    Abstract: An interposer includes two separate sets of pins, and inserts into two sockets on a printed circuit board. One set of pins supplies power to a step down converter (SDC) mounted on the interposer. The second set of pins provide inputs and outputs to an integrated circuit mounted on the interposer. One or more conductive traces in or on the interposer electrically connect an output of the SDC to an input of the integrated circuit, thus supplying regulated power to the integrated circuit through the interposer. The SDC and integrated circuit can be directly mounted on the interposer, or either or both can be mounted on packages that connect to the interposer. The SDC and integrated circuit can be flip chips or can be connected to the interposer or package using wirebonds. The packages can be pinned or connectable by solder bumps.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: April 2, 2002
    Assignee: Intel Corporation
    Inventors: P. R. Patel, Yuan-Liang Li, David G. Figueroa, Shamala Chickamenahalli, Huong T. Do