Abstract: An electronic system for controlling a power converter having an active clamping circuit includes a current sensor configured to sense current through a primary side of a transformer within the power converter, and a comparator sub-system. The comparator sub-system is configured to receive a transformer current signal from the current sensor and generate a trip signal based on a difference between the transformer current signal and a reference signal. The electronic system also includes a pulse width modulator configured to generate a gate input signal for the active clamping circuit based at least in part on the trip signal.

Abstract: A system comprises a first comparator, a second comparator, a pulse-width modulation (PWM) controller, and a ramp generator. The first comparator has a positive input coupled to a first ramp output of the ramp generator and a negative input configured to receive an input voltage. The second comparator has a positive input configured to receive the input voltage and a negative input coupled to a second ramp output of the ramp generator. The PWM controller is coupled to outputs and control signal inputs of the first and second comparators and has a control output. In some implementations, the ramp generator generates a high-side falling ramp for the first comparator and a low-side rising ramp for the second comparator. In some implementations, the ramp generator includes a first ramp generator for the high-side falling ramp and a second ramp for the low-side rising ramp.

Abstract: A system comprises a first comparator, a second comparator, a pulse-width modulation (PWM) controller, and a ramp generator. The first comparator has a positive input coupled to a first ramp output of the ramp generator and a negative input configured to receive an input voltage. The second comparator has a positive input configured to receive the input voltage and a negative input coupled to a second ramp output of the ramp generator. The PWM controller is coupled to outputs and control signal inputs of the first and second comparators and has a control output. In some implementations, the ramp generator generates a high-side falling ramp for the first comparator and a low-side rising ramp for the second comparator. In some implementations, the ramp generator includes a first ramp generator for the high-side falling ramp and a second ramp for the low-side rising ramp.

Abstract: A system includes a first controller configured to transmit a synchronization signal to a second controller. The second controller is configured to produce a PWM signal. The system also includes a counter configured to provide a count for the second controller, where the second controller is configured to initiate rising edges and falling edges of the PWM signal based on the count from the counter. The second controller is also configured to measure an error between a time when the synchronization signal is received at the second controller and an expected time of receipt for the synchronization signal. The second controller is also configured to adjust a period of the counter based at least in part on the error.

Abstract: A system includes a first controller configured to transmit a synchronization signal to a second controller. The second controller is configured to produce a PWM signal. The system also includes a counter configured to provide a count for the second controller, where the second controller is configured to initiate rising edges and falling edges of the PWM signal based on the count from the counter. The second controller is also configured to measure an error between a time when the synchronization signal is received at the second controller and an expected time of receipt for the synchronization signal. The second controller is also configured to adjust a period of the counter based at least in part on the error.

Abstract: A system includes a first controller configured to transmit a synchronization signal to a second controller. The second controller is configured to produce a PWM signal. The system also includes a counter configured to provide a count for the second controller, where the second controller is configured to initiate rising edges and falling edges of the PWM signal based on the count from the counter. The second controller is also configured to measure an error between a time when the synchronization signal is received at the second controller and an expected time of receipt for the synchronization signal. The second controller is also configured to adjust a period of the counter based at least in part on the error.

Abstract: A drive circuit includes a transient detector that includes a detector input to receive a loop error signal from a phased locked loop (PLL) and generates a transient detected output signal if a transient is detected in an alternating current (AC) input voltage. A controller includes a controller input to receive the transient detected output signal from the transient detector and a feedback input to sense the AC input voltage provided to a bridge circuit. The controller is configured to apply a PLL angle output signal from the PLL to control switch output signals to the bridge circuit if the transient detected output signal is not generated and configured to apply the AC input voltage sensed from the feedback input to control the switch output signals to the bridge circuit if the transient detected output signal is generated.

Abstract: A drive circuit includes a transient detector that includes a detector input to receive a loop error signal from a phased locked loop (PLL) and generates a transient detected output signal if a transient is detected in an alternating current (AC) input voltage. A controller includes a controller input to receive the transient detected output signal from the transient detector and a feedback input to sense the AC input voltage provided to a bridge circuit. The controller is configured to apply a PLL angle output signal from the PLL to control switch output signals to the bridge circuit if the transient detected output signal is not generated and configured to apply the AC input voltage sensed from the feedback input to control the switch output signals to the bridge circuit if the transient detected output signal is generated.

Abstract: A drive circuit includes a transient detector that includes a detector input to receive a loop error signal from a phased locked loop (PLL) and generates a transient detected output signal if a transient is detected in an alternating current (AC) input voltage. A controller includes a controller input to receive the transient detected output signal from the transient detector and a feedback input to sense the AC input voltage provided to a bridge circuit. The controller is configured to apply a PLL angle output signal from the PLL to control switch output signals to the bridge circuit if the transient detected output signal is not generated and configured to apply the AC input voltage sensed from the feedback input to control the switch output signals to the bridge circuit if the transient detected output signal is generated.

Abstract: A multiple-output integrated power factor correction system includes, for example, a processor that is formed in a substrate and is arranged to monitor each voltage output of two or more output stages of a power supply and in response to generate an individual voltage error signal for each monitored output stage. A combined output voltage error signal is generated in response to each of the individual voltage error signals. The voltage input to the power supply and the total inductor current of the power supply are monitored and used to generate a combined output voltage control signal in response to the monitored input voltage total inductor current as well as the combined output voltage error control signal. Each individual output voltage control signal for each monitored output stage is generated in response to each of the respective generated individual voltage error signals.

Abstract: A drive circuit includes a transient detector that includes a detector input to receive a loop error signal from a phased locked loop (PLL) and generates a transient detected output signal if a transient is detected in an alternating current (AC) input voltage. A controller includes a controller input to receive the transient detected output signal from the transient detector and a feedback input to sense the AC input voltage provided to a bridge circuit. The controller is configured to apply a PLL angle output signal from the PLL to control switch output signals to the bridge circuit if the transient detected output signal is not generated and configured to apply the AC input voltage sensed from the feedback input to control the switch output signals to the bridge circuit if the transient detected output signal is generated.

Abstract: A multiple-output integrated power factor correction system includes, for example, a processor that is formed in a substrate and is arranged to monitor each voltage output of two or more output stages of a power supply and in response to generate an individual voltage error signal for each monitored output stage. A combined output voltage error signal is generated in response to each of the individual voltage error signals. The voltage input to the power supply and the total inductor current of the power supply are monitored and used to generate a combined output voltage control signal in response to the monitored input voltage total inductor current as well as the combined output voltage error control signal. Each individual output voltage control signal for each monitored output stage is generated in response to each of the respective generated individual voltage error signals.

Abstract: A power supply includes a power factor correction module that is real-time adaptive based on the operating conditions.

Abstract: A multiple-output integrated power factor correction system includes, for example, a processor that is formed in a substrate and is arranged to monitor each voltage output of two or more output stages of a power supply and in response to generate an individual voltage error signal for each monitored output stage. A combined output voltage error signal is generated in response to each of the individual voltage error signals. The voltage input to the power supply and the total inductor current of the power supply are monitored and used to generate a combined output voltage control signal in response to the monitored input voltage total inductor current as well as the combined output voltage error control signal. Each individual output voltage control signal for each monitored output stage is generated in response to each of the respective generated individual voltage error signals.

Abstract: A power supply includes a power factor correction module that is real-time adaptive based on the operating conditions.

Abstract: A multiple-output integrated power factor correction system includes, for example, a processor that is formed in a substrate and is arranged to monitor each voltage output of two or more output stages of a power supply and in response to generate an individual voltage error signal for each monitored output stage. A combined output voltage error signal is generated in response to each of the individual voltage error signals. The voltage input to the power supply and the total inductor current of the power supply are monitored and used to generate a combined output voltage control signal in response to the monitored input voltage total inductor current as well as the combined output voltage error control signal. Each individual output voltage control signal for each monitored output stage is generated in response to each of the respective generated individual voltage error signals.

Abstract: In a first aspect, a control circuit is provided for use with a switch-mode power stage that provides an output voltage signal and an output current signal at an output power. The switch-mode power stage has a nominal voltage, a nominal current, a maximum current, an output power and a maximum power. The control circuit includes a voltage control loop and a current control loop, and the control circuit uses the voltage control loop to provide voltage mode control if the output current signal is greater than or equal to the nominal current and less than the maximum current, wherein the output power is substantially constant. Numerous other aspects are also provided.

Abstract: In a first aspect, a control circuit is provided for use with a switch-mode power stage that provides an output voltage signal and an output current signal at an output power. The switch-mode power stage has a nominal voltage, a nominal current, a maximum current, an output power and a maximum power. The control circuit includes a voltage control loop and a current control loop, and the control circuit uses the voltage control loop to provide voltage mode control if the output current signal is greater than or equal to the nominal current and less than the maximum current, wherein the output power is substantially constant. Numerous other aspects are also provided.

Abstract: An apparatus for controlling output signals at an output locus of a power converting device has a rectifier coupled to receive an input signal and present a rectified input signal for switching connection with one of a first and a second network. The first network includes the rectifier. The second network includes part of the first network and the output locus. The networks establish a return current to the rectifier. The apparatus includes: (a) a current indicating unit coupled with the output locus for combining an extant output signal with a time-integrated signal to present a calculated current signal; and (b) a comparing unit coupled with the first network and the current indicating unit for receiving the return current. The comparing unit drives the switching connection when the calculated current signal and the return current have a predetermined relationship.

Abstract: An uninterruptable power supply controlled by a digital signal processor. The digital signal processor periodically senses an input current, an input voltage, a battery current, a battery voltage boost circuit, first and second DC bus voltages, an output current and an output voltage. The digital signal processor controls an AC to DC conversion unit, a battery charger, a battery voltage boost circuit and a DC to AC inverter via an inner current loop and an outer voltage loop. The digital signal processor calculates the inner current loops each predetermined time interval and calculates the outer voltage loops every two predetermined time intervals. The digital signal processor preferably alternately senses a first group of signals consisting of the input voltage, the input current, the output voltage and the output current and a second group of signals consisting of the battery voltage, the battery current, the first DC bus voltage and a second DC bus voltage.