Abstract: A Stevia extract made from leaves of the Stevia rebaudiana plant is described. The extract has desired levels of steviol glycosides and is useful in food, beverage, and other consumable products.

Abstract: A method of making a semiconductor device includes forming a first transistor on a substrate, wherein forming the first transistor comprises forming a first source/drain electrode in the substrate. The method further includes forming a second transistor on the substrate, wherein forming the second transistor comprises forming a second source/drain electrode. The method further includes forming an insulating layer extending into the substrate, wherein the insulating layer directly contacts the first source/drain electrode and the second source/drain electrode, a top surface of the insulating layer is above a top surface of the substrate.

Abstract: The present invention discloses a ground inclination stereo profiling apparatus and method for a mechanical weeding component, and relates to the field of green agriculture. The ground inclination stereo profiling apparatus for the mechanical weeding component includes a rack assembly, an operation depth and inclination intelligent perception and feedback system, a hydraulic depth adjusting system and a control assembly.

Abstract: A method for manufacturing a semiconductor device includes forming a photoresist layer including a photoresist composition over a substrate. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a patterned photoresist. The photoresist composition includes a photoactive compound and a resin comprising a radical-active functional group and an acid labile group.

Abstract: A driver circuit is for driving a GaN power commutation switch of a switch mode power converter. A sensing component is connected to the GaN switch for sensing a parameter such as a peak current of the power commutation. An energy storage component provides a certain turn on voltage between the gate and source of the GaN switch. The charging and discharging of the energy storage component is regulated, and the sensing is disabled with timing which is synchronized with the charging and discharging function of the energy storage component. It is prevented that a voltage across the sensing component reduces the generated gate-source drive voltage of the GaN switch.

Abstract: A semiconductor device includes a substrate; a gate structure, located over the substrate, the gate structure including a first gate oxide layer, a second gate oxide layer, and a silicon layer. The first gate oxide layer is over the substrate, and the first gate oxide layer has a sloped sidewall on one side and a vertical sidewall on another side. The second gate oxide layer is over the substrate and on the sloped sidewall of the first gate oxide layer, and a thickness of the second gate oxide layer is less than a thickness of the first gate oxide layer. The silicon layer is formed over the first gate oxide layer and the second gate oxide layer.

Abstract: A semiconductor device includes a carrier, a first external contact, a second external contact, and a semiconductor die. The semiconductor die has a first main face, a second main face opposite to the first main face, a first contact pad disposed on the first main face, a second contact pad disposed on the second main face, a third contact pad disposed on the second main face, and a vertical transistor. The semiconductor die is disposed with the first main face on the carrier. A clip connects the second contact pad to the second external contact. A first bond wire is connected between the third contact pad and the first external contact. The first bond wire is disposed at least partially under the clip.

Abstract: The disclosure includes aspects of a system and/or method including a hash multi-table joining implementation method based on a grouping vector, which includes the following steps: 1) rewriting an SQL query command, and dividing a complete OLAP query command into a subtask of selecting-projecting-grouping-joining operation and an subtask of aggregating operation; 2) creating and generating grouping vector metadata corresponding to a GROUP-BY statement in an SQL command through the subtask of selecting-projecting-grouping-joining operation, and creating a vector index as an output result of the subtask of selecting-projecting-grouping-joining operation; 3) executing aggregation computation based on the vector index through the subtask of aggregating operation, and storing an aggregation computation result in a corresponding unit of a grouping vector aggregator with the same length as the grouping vector; and 4) merging the aggregation computation result in the grouping vector aggregator with the grouping vecto

Abstract: The present disclosure relates to a method of making one or more PAA-coated silver nanoparticles, including: heating an aqueous solution including a silver source material such as silver nitrate, a reducing agent such as monoethanolamine, and a capping molecule such as PAA under conditions suitable for forming a reaction mixture; and contacting the reaction mixture with an antisolvent to form one or more PAA-coated silver nanoparticles. In embodiments, the present disclosure includes a cathode catalyst, including: one or more substantially monodisperse PAA-coated silver nanoparticles, as well as cathodes and electrochemical cells including the PAA-coated silver nanoparticles.

Abstract: A boost converter has a main energy storage inductor and a main GaN boost switch with a node between them. A pre-charging switch is connected at the output side of the main boost switch and the inductor, between the node and an output capacitor. The pre-charging switch comprises a body diode in the forward direction from the output capacitor to the node. The output capacitor is charged by the pre-charging switch in a pre-charge phase and this provides a soft start-up to avoid large inrush currents. A third switch, which is also a GaN switch, is in series with the pre-charging switch to provide synchronous output rectification. The third switch has a body diode in a forward direction from the node to the output capacitor. In the pre-charge phase, both the boost switch and third switch are turned off whereas in a subsequent boost phase, the pre-charging switch is turned constantly on, and alternately the boost switch and the third switch are turned on and off to implement the boost conversion.

Abstract: Provided is a phase-locked loop circuit, a method for configuring the same, and a communication device. The phase-locked loop circuit includes a phase-locked loop main circuit and a phase temperature compensation circuit. The phase temperature compensation circuit includes at least one phase delay unit connected to the phase-locked loop main circuit and configured to generate a phase shift as a result of a temperature change for cancelling out a phase shift generated by the phase-locked loop main circuit as a result of a temperature change.

Abstract: The present invention provides a lactic acid bacterial composition for inhibiting the activity of Escherichia coli and/or treating or preventing jaundice, the composition including: a Bifidobacterium animalis subsp. lactis CP-9 strain and a Lactobacillus salivarius subsp. salicinius AP-32 strain. The present invention further provides a method for inhibiting growth of Escherichia coli, the method including the step(s) of: administering the foregoing lactic acid bacterial composition to a subject in need thereof. The present invention additionally provides a method for treating or preventing jaundice, the method including the step(s) of: administering the foregoing lactic acid bacterial composition to a subject in need thereof.

Abstract: The present disclosure provides methods and formulations for treating a patient suffering from one or more of chronic inflammatory injury, metaplasia, dysplasia or cancer of esophageal tissue and gastric tissue, which method comprises administering to the patient an agent that selectively kills or inhibits the proliferation or differentiation of pathogenic Barrett's Esophagus stem cells (BESCs) or Gastric Intestinal Metaplasia stem cells (GIMSCs) relative to normal regenerative esophageal stem cells or gastric stem cells in the tissue in which the BESCs or GIMSCs are found.

Abstract: A chip-to-chip interface of a multi-chip module (MCM), including: bidirectional data links for transmitting data signals and a direction indicator bit, wherein the direction indicator bit switches a direction of the bidirectional data links in real-time; a clock link for transmitting a clock signal common to the bidirectional data links, wherein the data and clock links are comprised of conductive traces between the chips and laid out to be of substantially equal length; and a clock driver means having a digitally programmable clock signal delay.

Abstract: A signal predistortion circuit configuration includes a digital predistortion circuit, a first transceiver, a first analog front-end (AFE) circuit, a second transceiver, and a second AFE circuit. The digital predistortion circuit outputs a first transmission signal according to first predistortion parameters and outputs a second transmission signal according to second predistortion parameters, and the digital predistortion circuit determines whether to adjust the first predistortion parameters according to a first reception signal and determines whether to adjust the second predistortion parameters according to a second reception signal. A transmitting circuit of the first transceiver, the first AFE circuit, and a receiving circuit of the second transceiver jointly generates the first reception signal according to the first transmission signal.

Abstract: Provided are a phase detection method and apparatus for a clock signal, and a communication device. A clock signal of a clock to be detected is sampled according to sampling periods set by a sampling clock; a phase angle value corresponding to a sampled clock signal in a current sampling period is obtained according to a mapping relationship between sampled signals and phase angle values; a phase difference corresponding to the current sampling period is subtracted from the phase angle value to obtain an initial phase value of the clock to be detected in the current sampling period, wherein the phase difference is a phase difference between the clock to be detected and the sampling clock in the current sampling period; and after the sampling ends, a final phase value of the clock to be detected is obtained according to initial phase values obtained in respective sampling periods.

Abstract: A driving circuit comprises a switch mode power converter circuit to convert a supply voltage (e.g. rectified mains), including an energy storage component and a main control switch. The energy storage component discharges to provide a regulated DC current to an output load upon the switching of the main control switch. A time-varying offset is used to modulate the regulated current hereby controlling the voltage across the energy storage component. In this way, the voltage across the energy storage component is maintained above the supply voltage with a safety margin, and this is used to prevent input current spikes and hence prevent an efficiency reduction of the driver circuit.

Abstract: The present invention discloses a power amplification apparatus having a digital pre-distortion mechanism that includes a digital pre-distortion circuit and a power amplifier. The digital pre-distortion circuit receives an original digital signal having an original real part and an original imaginary part. When a first one and a second one of the original real part and the original imaginary part are a low state voltage level and a high state voltage level, the digital pre-distortion circuit outputs a first and a second voltage levels equivalent to the low state voltage level as a first pre-distortion part and directly outputs the second one of the original real part and the original imaginary part as a second pre-distortion part to generate an input signal having an input real part and an input imaginary part each corresponding to one of the first pre-distortion part and the second pre-distortion part. The power amplifier receives the input signal to perform power amplification to generate an output signal.

Abstract: Embodiments relate to the field of semiconductor manufacturing technology, and more particularly, to a method for fabricating a semiconductor structure and a semiconductor structure. The fabricating method includes: providing a substrate including an array region and a peripheral region; and forming, on the substrate, a first mask layer covering the array region and the peripheral region, the first mask layer having a first device structure pattern directly facing the array region and a second device structure pattern directly facing the peripheral region. Through the method for fabricating a semiconductor structure, the first mask layer having the first device structure pattern and the second device structure pattern is formed on the substrate, and then the substrate is etched by using the first device structure pattern and the second device structure pattern as mask layer to synchronously form a peripheral region structure and an array region structure on the substrate.

Abstract: Embodiments relate to the field of semiconductor manufacturing technology, and more particularly, to a semiconductor structure and a method for fabricating a semiconductor structure. The semiconductor structure includes a substrate including a first array region and a second array region. The first array region is provided with a first memory array comprising a plurality of first memory structures, and the second array region is provided with a second memory array comprising a plurality of second memory structures. Compared with related technologies where different memory structures are stacked on a substrate, in this embodiment, the plurality of first memory structures and the plurality of second memory structures are arranged side by side on the substrate, which is advantageous to simplifying fabrication processes and improving production efficiency.