Abstract: A method for forming at least one doped region of a transistor includes providing a stack having an insulating layer, an active layer, and a gate pattern having a first lateral flank and removing a first portion of the active layer not overlaid by the gate pattern and extending down to the gate pattern, at the edge of a second portion of the active layer overlaid by the gate pattern, so as to expose an edge of the second portion. The edge extends substantially in a continuation of the lateral flank of the gate pattern. The method also includes forming a first spacer having an L shape and having a basal portion in contact with the insulating layer and a lateral portion in contact with the lateral flank; forming a second spacer on the first spacer; removing the basal portion of the first spacer by selective etching with respect to the second spacer, so as to expose the edge of the second portion; and forming the doped region by epitaxy from the exposed edge.

Abstract: A method for forming a doped zone of a transistor includes providing a stack having at least one active layer made from a semiconductor material, and a transistor gate pattern having at least one lateral side, and modifying a portion of the active layer so as to form a modified portion made of a modified semiconductor material. The modified portion extends down to the at least one lateral side of the gate pattern, at the edge of a non-modified portion above which the gate pattern is located. The method also includes forming a spacer on the lateral side, removing the modified portion by selective etching of the modified semiconductor material with respect to the semiconductor material of the non-modified portion, so as to expose an edge of the non-modified portion, and forming the doped zone by epitaxy starting from the exposed edge.

Abstract: The invention relates to a method for forming a porous portion in a substrate, an implantation of ions in at least one region of a layer, for example based on a semiconductor material, so as to form a portion enriched with at least one gas in the implanted region, and then a laser annealing of the nanosecond type so as to form a porous portion. The use of the ion implantation makes it possible to dissociate the deposition of the layer based on semiconductor material from the incorporation of gas. A great variety of porous structures can be obtained by the method. These porous structures can be adapted for numerous applications according to the properties sought.

Abstract: A donor substrate for transferring a single-crystal thin layer made of a first material, onto a receiver substrate. The donor substrate comprises: —a buried weakened plane delimiting an upper portion and a lower portion of the donor substrate, —in the upper portion, a first layer, a second layer adjacent to the buried weakened plane, and a stop layer between the first layer and the second layer the first layer composed of the first material, the stop layer being formed of a second material, —an amorphized sub-portion, made amorphous by ion implantation, having a thickness less than that of the upper portion, and including at least the first layer; the second layer comprising at least one single-crystal sub-layer, adjacent to the buried weakened plane. Two embodiments of a method may be used for transferring a single-crystal thin layer from the donor substrate.

Abstract: Producing a semiconductor or piezoelectric on-insulator type substrate for RF applications which is provided with a porous layer under the BOX layer and under a layer of polycrystalline semiconductor material.

Abstract: A method for producing a semiconductor substrate is provided, including: producing a superficial layer arranged on a buried dielectric layer and including a strained semiconductor region; producing an etching mask on the superficial layer, covering a part of the region; etching the superficial layer to a pattern of the mask, exposing a first lateral edge of a first strained semiconductor portion belonging to the part and contacting the dielectric layer; forming a mechanical barrier from a second portion of material belonging to the first portion, the second portion having a bottom surface contacting the dielectric layer and an upper surface contacting the mask, the barrier arranged against the part and bearing mechanically against the second portion, and removing the mask.

Abstract: A method for transferring a thin layer from a donor substrate to a receiver substrate including the steps of implantation of species carried out in a uniform manner on the whole of the donor substrate to form therein an embrittlement plane which delimits the thin layer and a bulk part of the donor substrate, of placing in contact the donor substrate and the receiver substrate and of initiating and propagating a fracture wave along the embrittlement plane. The method comprises, before the placing in contact, a step of localised reduction of a capacity of the embrittlement plane to initiate the fracture wave. This step of localised reduction may be carried out by means of a localised laser annealing of the donor substrate.

Abstract: A method for producing a semiconductor-on-insulator type substrate includes epitaxial deposition of a first semiconductor layer on a smoothing layer supported by a monocrystalline support substrate to form a donor substrate; production of an assembly by contacting the donor substrate with a receiver substrate; transfer, onto the receiver substrate, of the first semiconductor layer, the smoothing layer and a portion of the support substrate; and selective etching of the portion of the support substrate relative to the smoothing layer. The epitaxial deposition of the first semiconductor layer can be preceded by a surface preparation annealing of the support substrate at a temperature greater than 650° C. After the selective etching of the portion of the support substrate, selective etching of the smoothing layer relative to the first semiconductor layer and epitaxial deposition of a second semiconductor layer on the first semiconductor layer may be carried out in an epitaxy frame.

Abstract: Substrates may include a useful layer affixed to a support substrate. A surface of the useful layer located on a side of the useful layer opposite the support substrate may include a first region and a second region. The first region may have a first surface roughness, may be located proximate to a geometric center of the surface, and may occupy a majority of an area of the surface. The second region may have a second, higher surface roughness, may be located proximate to a periphery of the surface, and may occupy a minority of the area of the surface.

Abstract: Making of a transistor structure comprising in this order: forming semiconductor blocks made of SixGe1-x over the surface semiconductor layer and on either side of insulating spacers, the semiconductor blocks having lateral facets, growth of a silicon-based layer over the semiconductor blocks, so as to fill cavities located between said facets and said insulating spacers, thermal oxidation to perform a germanium enrichment of semiconductor portions of the surface semiconductor layer disposed on either side of the spacers.

Abstract: A production method for a semi-conductor-on-insulator type multilayer stack includes ion implantation in a buried portion of a superficial layer of a support substrate, so as to form a layer enriched with at least one gas, intended to form a porous semi-conductive material layer, the thermal oxidation of a superficial portion of the superficial layer to form an oxide layer extending from the surface of the support substrate, the oxidation and the implantation of ions being arranged such that the oxide layer and the enriched layer are juxtaposed, and the assembly of the support substrate and of a donor substrate.

Abstract: Provided are embodiments for a semiconductor device. The semiconductor device includes a nanosheet stack comprising one or more layers, wherein the one or more layers are induced with strain from a modified sacrificial gate. The semiconductor device also includes one or more merged S/D regions formed on exposed portions of the nanosheet stack, wherein the one or more merged S/D regions fix the strain of the one or more layers, and a conductive gate formed over the nanosheet stack, wherein the conductive gate replaces a modified sacrificial gate without impacting the strain induced in the one or more layers. Also provided are embodiments for a method for creating stress in the channel of a nanosheet transistor.

Abstract: A method for manufacturing a semiconductor-on-insulator substrate by BESOI comprising the following steps: a) provide a structure comprising a first substrate, a first stopping layer made of SiGe having an atomic percentage of Ge lower than or equal to 30%, an intermediate layer, a second stopping layer made of SiGe having a thickness smaller than the thickness of the first stopping layer and an atomic percentage of Ge higher than or equal to 20%, optionally an active area formed by a layer made of silicon or by a stack of active layers made of Si and SiGe, a dielectric layer, a second substrate, b) thin and then etch the first substrate made of silicon, from the first main face up to the second main face, c) successively remove the first stopping layer, the intermediate layer, and optionally the second stopping layer to obtain a SOI or SiGeOI substrate.

Abstract: Method for producing a semiconductor device, including: producing, on a first region of a surface layer comprising a first semiconductor and disposed on a buried dielectric layer, a layer of a second compressive strained semiconductor along a first direction; etching a trench through the layer of the second semiconductor forming an edge of a portion of the layer of the second semiconductor oriented perpendicularly to the first direction, and wherein the bottom wall is formed by the surface layer; thermal oxidation forming in the surface layer a semiconductor compressive strained portion along the first direction and forming in the trench an oxide portion; producing, through the surface layer and/or the oxide portion, and through the buried dielectric layer, dielectric isolation portions around an assembly formed of the compressive strained semiconductor portion and the oxide portion; and wherein the first semiconductor is silicon, the second semiconductor is SiGe, and said at least one compressive strained

Abstract: An electronic device including at least first and second superimposed transistors comprises at least a substrate; a first transistor including a portion of a first nanowire forming a first channel, and first source and drain regions in contact with ends of the first nanowire portion; and a second transistor including a portion of a second nanowire forming a second channel and having a greater length than that of the first channel, and second source and drain regions in contact with ends of the second nanowire portion such that the second transistor is arranged between the substrate and the first transistor. A dielectric encapsulation layer covers at least the second source and drain regions and such that the first source and drain regions are arranged at least partly on the dielectric encapsulation layer, and forms vertical insulating portions extending between the first and second source and drain regions.

Abstract: The invention relates to a method of healing defects related to implantation of species in a donor substrate (1) made of a semiconducting material to form therein a plane of weakness (5) in it separating a thin layer (4) from a bulk part of the donor substrate. The method comprises a superficial amorphisation of the thin layer, followed by application of a heat treatment on the superficially amorphised thin layer. The method comprises application of laser annealing to the superficially amorphised thin layer after the heat treatment, to recrystallise it in the solid phase.

Abstract: A method for manufacturing a semiconductor-on-insulator type substrate for radiofrequency applications is provided, including the steps of: directly bonding a support substrate of a single crystal material and a donor substrate including a thin layer of a semiconductor material, one or more layers of dielectric material being at a bonding interface thereof; transferring the thin layer onto the support substrate; and forming an electric charge trap region in the support substrate in contact with the one or more layers of the dielectric material present at the bonding interface, by transforming a buried zone of the support substrate into a polycrystal.

Abstract: An electronic device is provided, including a transistor and a substrate surmounted by first through third elements, the second element being arranged between the first and the third elements and including a nano-object, a transistor channel area being formed by part of the nano-object, a first end of the nano-object being connected to the first element by a first electrode including a first part forming a first continuity of matter and a second part formed on the first part, a second end of the nano-object being connected to the third element by a second electrode including a first part forming a second continuity of matter and a second part formed on the first part, such that a lattice parameter of the second part is suited to a lattice parameter of the first part to induce a stress in the nano-object along a reference axis.

Abstract: A method for modifying a strain state of at least one semiconductor layer includes providing a support over which is arranged at least one stack of layers including the semiconductor layer and a fusible layer, arranged between the semiconductor layer and the support. The method also includes melting at least one portion of the fusible layer the passage of said at least one portion of the fusible layer from a solid state into a liquid state, the semiconductor layer remaining in the solid state during the melting step. A laser beam may be used for the melting. The melting with the laser beam may also cause the modification of the strain state of the semiconductor layer.

Abstract: A method for hydrophilic direct bonding of a first substrate onto a second substrate is provided, including: providing the first substrate having a first main surface and the second substrate having a second main surface; bringing the first and the second substrates into contact with one another, respectively, via the first and the second main surfaces, to form a bonding interface between two bonding surfaces; applying a heat treatment to close the bonding interface; and prior to the step of bringing the first and the second substrates into contact, forming, on the first main surface and/or on the second main surface, a bonding layer made of an amorphous semiconductor material having doping elements and a thickness of less than or equal to 50 nm, a face of the bonding layer constituting one of the two bonding surfaces, an oxide layer being less than 20 nm from the bonding interface.