Patents by Inventor Sheila F. Chopin

Sheila F. Chopin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230415397
    Abstract: An encapsulant compound apparatus, includes a mechanical operator, and an insert disposed on a surface of the mechanical operator. The insert operates to capture foreign material in the encapsulant compound.
    Type: Application
    Filed: September 11, 2023
    Publication date: December 28, 2023
    Inventors: Sheila F. Chopin, Nishant Lakhera, Boon Yew Low
  • Patent number: 11787097
    Abstract: An encapsulant compound apparatus, includes a mechanical operator, and an insert disposed on a surface of the mechanical operator. The insert operates to capture foreign material in the encapsulant compound.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: October 17, 2023
    Assignee: NXP USA, INC.
    Inventors: Sheila F. Chopin, Nishant Lakhera, Boon Yew Low
  • Publication number: 20220250301
    Abstract: An encapsulant compound apparatus, includes a mechanical operator, and an insert disposed on a surface of the mechanical operator. The insert operates to capture foreign material in the encapsulant compound.
    Type: Application
    Filed: February 10, 2021
    Publication date: August 11, 2022
    Inventors: Sheila F. Chopin, Nishant Lakhera, Boon Yew Low
  • Patent number: 10217713
    Abstract: The present disclosure provides for embodiments of packaged semiconductor devices. In one embodiment, a packaged semiconductor device for a die includes an exposed structure. The die has an active surface and a backside surface opposite the active surface. A first surface of the exposed structure is joined to die attach material, and the die attach material is further joined to the backside surface of the die. The exposed structure includes a plurality of openings through the exposed structure within a perimeter of the die, and the die is exposed through the plurality of openings.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: February 26, 2019
    Assignee: NXP USA, Inc.
    Inventors: Sheila F. Chopin, Thomas H. Koschmieder, Varughese Mathew
  • Patent number: 10199339
    Abstract: A packaged semiconductor device is made by forming a conductive pad on an external surface of an integrated circuit device, forming a passivation layer over the conductive pad, removing a portion of the passivation layer over a bond area on the conductive pad, forming a sacrificial anode around a majority of a periphery surrounding the bond area, forming a conductive bond in the bond area, and forming an encapsulating material around the conductive bond and an exposed portion of the sacrificial anode.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: February 5, 2019
    Assignee: NXP USA, Inc.
    Inventors: Sheila F. Chopin, Min Ding, Varughese Mathew, Scott S. Roth
  • Publication number: 20170098618
    Abstract: The present disclosure provides for embodiments of packaged semiconductor devices. In one embodiment, a packaged semiconductor device for a die includes an exposed structure. The die has an active surface and a backside surface opposite the active surface. A first surface of the exposed structure is joined to die attach material, and the die attach material is further joined to the backside surface of the die. The exposed structure includes a plurality of openings through the exposed structure within a perimeter of the die, and the die is exposed through the plurality of openings.
    Type: Application
    Filed: December 22, 2016
    Publication date: April 6, 2017
    Inventors: Sheila F. CHOPIN, Thomas H. KOSCHMIEDER, Varughese MATHEW
  • Publication number: 20160329288
    Abstract: A packaged semiconductor device is made by forming a conductive pad on an external surface of an integrated circuit device, forming a passivation layer over the conductive pad, removing a portion of the passivation layer over a bond area on the conductive pad, forming a sacrificial anode around a majority of a periphery surrounding the bond area, forming a conductive bond in the bond area, and forming an encapsulating material around the conductive bond and an exposed portion of the sacrificial anode.
    Type: Application
    Filed: July 20, 2016
    Publication date: November 10, 2016
    Inventors: SHEILA F. CHOPIN, MIN DING, VARUGHESE MATHEW, SCOTT S. ROTH
  • Patent number: 9426884
    Abstract: A method of forming an electronic component includes masking a lead frame to form a mask defining an exposed area, oxidizing the exposed area of the lead frame, wherein the mask inhibits oxidation of an unexposed area, and removing the mask from the lead frame following oxidizing. A lead frame can include a metal sheet patterned to define a pad region and leads. The metal sheet includes metal oxide in a select area. The pad region is substantially free of metal oxide.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: August 23, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Sheila F. Chopin, Varughese Mathew
  • Patent number: 9412709
    Abstract: A packaged semiconductor device is made by forming a conductive pad on an external surface of an integrated circuit device, forming a passivation layer over the conductive pad, removing a portion of the passivation layer over a bond area on the conductive pad, forming a sacrificial anode around a majority of a periphery surrounding the bond area, forming a conductive bond in the bond area, and forming an encapsulating material around the conductive bond and an exposed portion of the sacrificial anode.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: August 9, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Sheila F. Chopin, Min Ding, Varughese Mathew, Scott S. Roth
  • Publication number: 20160071787
    Abstract: The present disclosure provides for embodiments of packaged semiconductor devices. In one embodiment, a packaged semiconductor device for a die includes an exposed structure. The die has an active surface and a backside surface opposite the active surface. A first surface of the exposed structure is joined to die attach material, and the die attach material is further joined to the backside surface of the die. The exposed structure includes a plurality of openings through the exposed structure within a perimeter of the die, and the die is exposed through the plurality of openings.
    Type: Application
    Filed: September 8, 2014
    Publication date: March 10, 2016
    Inventors: SHEILA F. CHOPIN, THOMAS H. KOSCHMIEDER, VARUGHESE MATHEW
  • Patent number: 9111952
    Abstract: A method includes forming a packaged integrated circuit that includes forming a lead frame by separating an outer portion of the metal structure into a plurality of leads by stamping. The plurality of leads have sides with a first concavity. The lead frame is further formed by performing an etch on the sides of the plurality of leads to achieve a second concavity on the sides of leads. The second concavity is greater than the first concavity. A semiconductor die is attached to a center portion of the metal structure. Electrical attachments are made between the die and the leads.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: August 18, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Leo M. Higgins, III, Sheila F. Chopin
  • Patent number: 9093383
    Abstract: A mold compound is provided for encapsulating a semiconductor device (101). The mold compound comprises at least approximately 70% by weight silica fillers, at least approximately 10% by weight epoxy resin system, and beneficial ions that are beneficial with respect to copper ball bond corrosion. A total level of the beneficial ions in the mold compound is at least approximately 100 ppm.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: July 28, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Sheila F. Chopin, Varughese Mathew, Leo M. Higgins, III, Chu-Chung Lee
  • Patent number: 8955388
    Abstract: A technique for testing the compatibility of an encapsulation material and a wire bond included at an unencapsulated assembly. The technique includes immersing the assembly in an encapsulating compound extract. The assembly includes a semiconductor die and a bonding wire affixed to a metalized pad of the semiconductor die by the wire bond. After the immersing, a mechanical strength of the wire bond is determined.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: February 17, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Varughese Mathew, Sheila F. Chopin, Leo M. Higgins, III
  • Publication number: 20150027767
    Abstract: A method of forming an electronic component includes masking a lead frame to form a mask defining an exposed area, oxidizing the exposed area of the lead frame, wherein the mask inhibits oxidation of an unexposed area, and removing the mask from the lead frame following oxidizing. A lead frame can include a metal sheet patterned to define a pad region and leads. The metal sheet includes metal oxide in a select area. The pad region is substantially free of metal oxide.
    Type: Application
    Filed: July 25, 2013
    Publication date: January 29, 2015
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Sheila F. Chopin, Varughese Mathew
  • Publication number: 20140346663
    Abstract: A packaged semiconductor device is made by forming a conductive pad on an external surface of an integrated circuit device, forming a passivation layer over the conductive pad, removing a portion of the passivation layer over a bond area on the conductive pad, forming a sacrificial anode around a majority of a periphery surrounding the bond area, forming a conductive bond in the bond area, and forming an encapsulating material around the conductive bond and an exposed portion of the sacrificial anode.
    Type: Application
    Filed: May 21, 2013
    Publication date: November 27, 2014
    Inventors: Sheila F. Chopin, Min Ding, Varughese Mathew, Scott S. Roth
  • Patent number: 8853867
    Abstract: A mold compound is provided for encapsulating a semiconductor device (101). The mold compound comprises at least approximately 70% by weight silica fillers, at least approximately 10% by weight epoxy resin system, and beneficial ions that are beneficial with respect to copper ball bond corrosion. A total level of the beneficial ions in the mold compound is at least approximately 100 ppm.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: October 7, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Sheila F. Chopin, Varughese Mathew, Leo M. Higgins, III, Chu-Chung Lee
  • Publication number: 20140273352
    Abstract: A method includes forming a packaged integrated circuit that includes forming a lead frame by separating an outer portion of the metal structure into a plurality of leads by stamping. The plurality of leads have sides with a first concavity. The lead frame is further formed by performing an etch on the sides of the plurality of leads to achieve a second concavity on the sides of leads. The second concavity is greater than the first concavity. A semiconductor die is attached to a center portion of the metal structure. Electrical attachments are made between the die and the leads.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Leo M. Higgins, III, Sheila F. Chopin
  • Patent number: 8836110
    Abstract: A packaged semiconductor device includes a package substrate, an integrated circuit (IC) die mounted on the package substrate, and a heat spreader mounted on the package substrate. The heat spreader surrounds at least a portion of the IC die and includes a lid with a plurality of openings. An inner portion of the heat spreader includes a plurality of thermally conductive protrusions adjacent the die.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: September 16, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Sheila F. Chopin, Varughese Mathew
  • Publication number: 20140145339
    Abstract: A mold compound is provided for encapsulating a semiconductor device (101). The mold compound comprises at least approximately 70% by weight silica fillers, at least approximately 10% by weight epoxy resin system, and beneficial ions that are beneficial with respect to copper ball bond corrosion. A total level of the beneficial ions in the mold compound is at least approximately 100 ppm.
    Type: Application
    Filed: January 31, 2014
    Publication date: May 29, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Sheila F. CHOPIN, Varughese MATHEW, Leo M. HIGGINS, III, Chu-Chung LEE
  • Publication number: 20140061894
    Abstract: A packaged semiconductor device, comprising a package substrate, an integrated circuit (IC) die mounted on the package substrate, and a heat spreader mounted on the package substrate. The heat spreader surrounds at least a portion of the IC die and includes a lid with a plurality of openings. An inner portion of the heat spreader includes a plurality of thermally conductive protrusions adjacent the die.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Inventors: Sheila F. Chopin, Varughese Mathew